What is the input/output characteristics of a 3bit ADC

[blue_tiger30]

im trying to Plot the effective input/output voltage amplitude characteristic of this ADC – i.e., give a graph relating the input
along the x-axis to
the out put od the adc
along the y-axis)
here is the signal
https://dl.dropboxusercontent.com/u/3405118/1.png
the 2nd pic is what I think is the answer so could anyone tell me if it is right

<< Image size reduced by Mentor -- See next post>>

 

[blue_tiger30]

Homework Statement

what is the input/output characteristics of a 3bit ADC

im trying to Plot the effective input/output voltage amplitude characteristic of this ADC – i.e., give a graph relating the input
along the x-axis to
the out put od the adc
along the y-axis)

Homework Equations

this is the signal

https://dl.dropboxusercontent.com/u/3405118/1.png

The Attempt at a Solution

this is what I get , is it correct ?

<< Image reduced in size by Mentor >>

 

[sophiecentaur]

The y-axis (output) values can only be discrete values so the characteristic should be a set of steps with vertical sides. Your version has sloping sides, perhaps because you want it to look a bit like the sinewave but you have asked for the I/O characteristic, which is independent of the input signal. Remember, all values of the input signal will give the same output value until it reaches the next decision level, whereupon it changes to the next discrete level and so on.
Write the numbers down first and then plot your I/O graph from the table you get - you are being influenced by the shape of the given curve. There are only 8 possible output values- 000 to 111.

 

[blue_tiger30]

I got what you are saying but i was asked to do an i/o amplitude voltage plot , doesn't that mean that I look at the voltage when the signal is at 0.5 v for example and look at the voltage of the quantised value of the signal which is around 0.4 volts (basically the voltage of the red dot vs the voltage of the black dot ) ?

 

[sophiecentaur]

Just read what I wrote again, carefully.
The only possible values that the output can have can be one of the eight, given by 000 to 111. Your graph cannot show any other y values. Hence the staircase shape.
[Edit: And, of course, to plot the I/O characteristic, you have to show what happens for ALL values of input, which gives a continuous line and not isolated points. AND the output values are not decimals, they are binary values (see right hand scale).]

 

[blue_tiger30]

i understand your point that the output of an ADC is discrete from 0 to 8 in binary , but he is asking for i/o in voltage amplitudes not in desecrate amplitudes that's what is confusing me

 

[sophiecentaur]

The input levels are not discrete; they can be anything and your characteristic needs to include all possibilities. The output (binary) values are discrete. So the y coordinates can only have 8 values but the x coordinates can have (and they all need to be plotted) a continuum of values. What would the output value be for an input of 0.55, for instance?
Take another example - on a car race, you are traveling constantly but, you may change tyres three times during the race. What would a graph of tyre number against distance look like? You could tell what tyre you were using after 23.65 miles, couldn't you? Can you see the similarity with the original question - or have I confused you even further?

 

[blue_tiger30]

it is going to be 110 . but if I do that graph it would be the input (volts)/ output(binary) while the question was input(volts)/output(volts)

 

[sophiecentaur]

The output from an ADC is a number and not a voltage. It may be that they require you to read from that graph, the amplitude on the left, corresponding to each of the eight levels and 'pretend' that the ADC output has been displayed on a DVM with some appropriate scaling. But even in that case, it will only yield discrete output values as the continuous input has been quantised. Your pencil graph still needs to be corrected to look like a staircase.
Actually, from your OP, it is not clear what they actually require. They seem to want the "output" which, to me, looks as if they want the numbers and not quasi-voltages. If in doubt - put both on the graph y-axis because the shape of the graph is precisely the same in both cases.

 

[CWatters]

it is going to be 110 . but if I do that graph it would be the input (volts)/ output(binary) while the question was input(volts)/output(volts)

So convert the digital output "steps" to volts. Imagine you put the binary back through a D-A converter with no output filter or scaling..

The input ranges from -1 to +1 = 2V. There are 8 steps so each is 250mV wide/high.

Input(x)...Binary...Output(y)

-1 to -0.75 = 000 = 0V
-0.75 to -0.5 = 001 = 0.25V
-0.5 to -0.25 = 010 = 0.50V
etc

At least that's what I'd give as the answer.

EDIT: Actually putting both on the axis as per Sophiecentaur suggestion is better.

 

[sophiecentaur]

Basically the question is flawed and it is managing, very unfairly, to get the OP confused.
A DAC converts an analogue signal into a Binary Word. A 'Quantiser' will produce a number of different quantised levels from an analogue signal (but that is not a DAC). If the question asks for the I/O of a DAC then the output values must be Digital( Three bits or possibly 0,1,2,3,4,5,6,7) - or it's not describing a DAC. It could be describing a DVM, perhaps but that is not mentioned in the question.

 

[Runei]

I don't know if this will just further any confusion, but another way to relate input/output relationship of an ADC, is that the quantisation adds "noise" to the signal.This noise will have a maximum value (which will be in the order of the quantisation of the ADC so with 8 levels and a reference of 3.3 V that is 412.5 mV).

Thus, the output voltage from the ADC (if we wanted to convert it back into an analog voltage) is the input signal, but with an added noise with a maximum of 412mV.

Edit: Normally we say that the quantisation error can be "modeled as noise".

 

[blue_tiger30]

so is this graph correct ? is it ok if it is not linear ?

 

[Jiggy-Ninja]

Basically the question is flawed and it is managing, very unfairly, to get the OP confused.
A DAC converts an analogue signal into a Binary Word. A 'Quantiser' will produce a number of different quantised levels from an analogue signal (but that is not a DAC). If the question asks for the I/O of a DAC then the output values must be Digital( Three bits or possibly 0,1,2,3,4,5,6,7) - or it's not describing a DAC. It could be describing a DVM, perhaps but that is not mentioned in the question.

ADC, not DAC

I don't know if this will just further any confusion, but another way to relate input/output relationship of an ADC, is that the quantisation adds "noise" to the signal.This noise will have a maximum value (which will be in the order of the quantisation of the ADC so with 8 levels and a reference of 3.3 V that is 412.5 mV).

Thus, the output voltage from the ADC (if we wanted to convert it back into an analog voltage) is the input signal, but with an added noise with a maximum of 412mV.

Edit: Normally we say that the quantisation error can be "modeled as noise".

I don't think that's going to help any.

so is this graph correct ? is it ok if it is not linear ?

Certainly looks better having discrete star-steps instead of linear interpolations between the data points. It doesn't look perfectly right on the values (the double-step on the left looks wrong), but you've got the basic idea now.

 

[blue_tiger30]

can you please show me how it should be , because I have been working 3 days on this and I really want to do it right

 

[carlgrace]

This is a VERY good introduction to ADCs. Check out slide 4. It answers your questions.

http://amesp02.tamu.edu/~jsilva/610/Lecture%20notes/Papers/ABCs_of_ADCs.pdf

 

[jim hardy]

Sophie pointed out to OP that what was asked is an X-Y plot not a time plot.
Perhaps not emphatically enough ?

The plot should resemble a stairstep with only eight levels including zero.

X axis will be volts, analog, continuous, from -1 on left to +1 on right.
Y axis will be counts not volts - an ADC does not produce volts. It'll go from 000 on bottom to 111 on top.
If you want to plot output as volts that would be represented by the count, well you can try... but you aren't given the information at what point between the dots the ADC changed its count.
Be sure to ask teacher where the ADC changes - does it round or truncate?

Connect the dots with straight horizontal and vertical lines is the best you can do,,, maybe venture a guess that the count changes midway between dots..

it REALLY is that simple.

 

[CWatters]

This would be my answer. You can argue if I should include the figures in brackets on the vertical axis.

 

[CWatters]

Connect the dots with straight horizontal and vertical lines is the best you can do,,, maybe venture a guess that the count changes midway between dots..

I note the black dots aren't an exact fraction of the period or on multiples of 0.25V so there are some clues in the data. Not quite enough to be 100% certain but enough to be pretty sure the transitions are on multiples of 0.25V.

 

[sophiecentaur]

I note the black dots aren't an exact fraction of the period or on multiples of 0.25V so there are some clues in the data. Not quite enough to be 100% certain but enough to be pretty sure the transitions are on multiples of 0.25V.

Yes. If the ADC is any good at all (i.e. strictly linear) then it will be dividing the interval -1V to 1V into 8 equal portions. With that form of coding, the digital value for zero volts is actually 'missing' because the the number output jumps directly from 3 to 4 as it crosses the zero volts point. There is a 'half bit offset', to make the range symmetrical.

 

[sophiecentaur]

I don't know if this will just further any confusion, but another way to relate input/output relationship of an ADC, is that the quantisation adds "noise" to the signal.This noise will have a maximum value (which will be in the order of the quantisation of the ADC so with 8 levels and a reference of 3.3 V that is 412.5 mV).

Thus, the output voltage from the ADC (if we wanted to convert it back into an analog voltage) is the input signal, but with an added noise with a maximum of 412mV.

Edit: Normally we say that the quantisation error can be "modeled as noise".

When the input signal is a pure sinewave and the samples are taken at regular intervals, the error is a 'distortion' rather than noise and the additional spectral components are related to the sampling frequency and the sampled signal frequency and have a 'comb' distribution, rather than the continuous spectrum of true noise. The noiselike quality of this quantising distortion arises once the sampled signal becomes less 'pure'. Any small amount of jitter / hum and low level source noise will rapidly make the quantisation distortion very much more noise like by spreading out the distortion products.
I am adding this comment because I remember (in my youth) questioning how a 'regular process' such as the simple action of a DAC on a Sine wave could add a random factor ('noise) - and it turned out that it doesn't, actually.