- #1
abraxas
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Hi,
I'm doing research to chipproduction, and I can't seem to figure out how transistors really work (in detail). I'm looking at this CMOS inverter gate for example: http://people.deas.harvard.edu/~jones/es154/assigns/prob_assign_01/prob_assign_5_01/cmos_1.gif
More detailed: http://www.scudc.scu.edu/mentortu/pic/spice1.gif
Chips provide a high- and low-voltage rail (low being ground, high often being referred to as V-DD). What I know about voltage is that it can be regarded as the pressure behind electron flow. So to me, it seems that 0 Volt would mean a complete lack of flow. In this CMOS inverter gate image, the input is either a high or low voltage which controls 2 transistors (NMOS and PMOS), which act opposite from each other. If one is open, the other one is closed. If a low voltage signal is provided, the top transistor will close, and electrons will flow from the high-voltage rail (V-DD) to the gate output (V-Out).
What I don't understand is, if low voltage is a total lack of electron flow, why is there any need for a ground-rail? If the top transistor in this image is open (no conduction), wouldn't it automatically be a 0-volt situation because electrons won't flow?
The way I see it, in the binary system, a 1 (high-voltage) means flowing electrons and 0 (0 Volts) means no flowing electrons. But maybe I've got this all wrong. I'm no physics major and I don't know too much about electric circuits, so there's probably some fundamental information missing, that I have no idea about.
Is there anyone who could shed some light on this? Thanks very much in advance.
edit:
Somebody seemed to have moved this thread to the Quantum Physics topic (I don't see what Q.P. would have to do with this though).
I'm doing research to chipproduction, and I can't seem to figure out how transistors really work (in detail). I'm looking at this CMOS inverter gate for example: http://people.deas.harvard.edu/~jones/es154/assigns/prob_assign_01/prob_assign_5_01/cmos_1.gif
More detailed: http://www.scudc.scu.edu/mentortu/pic/spice1.gif
Chips provide a high- and low-voltage rail (low being ground, high often being referred to as V-DD). What I know about voltage is that it can be regarded as the pressure behind electron flow. So to me, it seems that 0 Volt would mean a complete lack of flow. In this CMOS inverter gate image, the input is either a high or low voltage which controls 2 transistors (NMOS and PMOS), which act opposite from each other. If one is open, the other one is closed. If a low voltage signal is provided, the top transistor will close, and electrons will flow from the high-voltage rail (V-DD) to the gate output (V-Out).
What I don't understand is, if low voltage is a total lack of electron flow, why is there any need for a ground-rail? If the top transistor in this image is open (no conduction), wouldn't it automatically be a 0-volt situation because electrons won't flow?
The way I see it, in the binary system, a 1 (high-voltage) means flowing electrons and 0 (0 Volts) means no flowing electrons. But maybe I've got this all wrong. I'm no physics major and I don't know too much about electric circuits, so there's probably some fundamental information missing, that I have no idea about.
Is there anyone who could shed some light on this? Thanks very much in advance.
edit:
Somebody seemed to have moved this thread to the Quantum Physics topic (I don't see what Q.P. would have to do with this though).
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