- #1
perplexabot
Gold Member
- 329
- 5
Hi all. I don't know if I have given this enough thought but I will ask anyway. I know that a CMOS is an inverter, so for input High you will get output Low, and for input Low you will get output High. I am trying to find this out mathematically (or even just logically) but I can't seem to do it.
Say Vdd (power supply to pMOS) is 5v and Vin is also 5v. In this case the PMOS will be in cutoff mode and the NMOS will be in saturation mode. Vgs of the NMOS will be 5v. I don't know what to do next. I know that the saturation current equation for the NMOS does not include Vd (or Vds) when channel length modulation is neglected, so I have no idea how to get Vd of NMOS (AKA: Vd of PMOS, AKA: Vout).
PS: Another thing that is bothering me, is when say Vin is 5v (and Vdd is also 5v), the NMOS should have current passing through it (since in saturation) but the PMOS should not have current passing through it (since in cutoff). Kind of a paradox in my opinion. But it kind of makes sense that Vo will be zero in order to negate this current.
Anyone?
Say Vdd (power supply to pMOS) is 5v and Vin is also 5v. In this case the PMOS will be in cutoff mode and the NMOS will be in saturation mode. Vgs of the NMOS will be 5v. I don't know what to do next. I know that the saturation current equation for the NMOS does not include Vd (or Vds) when channel length modulation is neglected, so I have no idea how to get Vd of NMOS (AKA: Vd of PMOS, AKA: Vout).
PS: Another thing that is bothering me, is when say Vin is 5v (and Vdd is also 5v), the NMOS should have current passing through it (since in saturation) but the PMOS should not have current passing through it (since in cutoff). Kind of a paradox in my opinion. But it kind of makes sense that Vo will be zero in order to negate this current.
Anyone?