Capacitor causing a negative dip fixed an issue, why?

[ConeOfIce]

Hi all,

At work we were working on a bus-hold issue that we fixed with a bit of an unconventional method. We had a circuit that looked somewhat like:

Buf>--R(33)------R2(2.7k)---->BH
.....|
......cap(220p)
.....|
......GND

Where Buf is a buffer, and BH is a bus-hold buffer. This is really just a switch circuit, with no AC component.
Now when more of the RC with BH is put in parallel the circuit starts to fail when the buffer is driving from high to low. The reason this seems to be is because the bus-hold requires -750uA to switch.

It would fail by dropping down to 1.5V(typical CMOS switching voltage) and getting stuck there.

The solution that happaned to fix this issue was placing a very large capacitor across the 33 ohm resistor and increasing the resistor to 260 ohms.

The larger the capacitor the better the fix. The fix also didn't work unless the resistor was increased.

I believe this worked for 2 reasons.
The first, was the cap essentially eliminated the resistor from the circuit in terms of creating a current, thus more current was available as the 33 ohms started to become more significant when more add-ons were put into parallel.

The second one, is that the capacitor would cause a very large temporary negative voltage on either side of it (sometimes about to about 1.5V more then seen without the cap). This temporary drop in voltage created a temporary inrush of current helping to make the bus-hold switch. The large cap also helps to decrease resonance upon returning to 0 volts.

I am failing to understand why the capacitor is causing this dip in voltage, and was wondering if anyone else could shine some light on this.

Thanks for the help!

 

[berkeman]

Hi all,

At work we were working on a bus-hold issue that we fixed with a bit of an unconventional method. We had a circuit that looked somewhat like:

Buf>--R(33)------R2(2.7k)---->BH
.....|
......cap(220p)
.....|
......GND

Where Buf is a buffer, and BH is a bus-hold buffer. This is really just a switch circuit, with no AC component.
Now when more of the RC with BH is put in parallel the circuit starts to fail when the buffer is driving from high to low. The reason this seems to be is because the bus-hold requires -750uA to switch.

It would fail by dropping down to 1.5V(typical CMOS switching voltage) and getting stuck there.

The solution that happaned to fix this issue was placing a very large capacitor across the 33 ohm resistor and increasing the resistor to 260 ohms.

The larger the capacitor the better the fix. The fix also didn't work unless the resistor was increased.

I believe this worked for 2 reasons.
The first, was the cap essentially eliminated the resistor from the circuit in terms of creating a current, thus more current was available as the 33 ohms started to become more significant when more add-ons were put into parallel.

The second one, is that the capacitor would cause a very large temporary negative voltage on either side of it (sometimes about to about 1.5V more then seen without the cap). This temporary drop in voltage created a temporary inrush of current helping to make the bus-hold switch. The large cap also helps to decrease resonance upon returning to 0 volts.

I am failing to understand why the capacitor is causing this dip in voltage, and was wondering if anyone else could shine some light on this.

Thanks for the help!

To be honest, it sounds like you guys are heading off into the weeds. What in the world is all of that RC stuff for anyway? That's not how you ensure signal integrity. You do that with good transmission line design and terminations. What is the purpose of the RC circuit?

What Bus Keepers are you using? Are you using them to ensure a hold time requirement on a tri-state shared bus?

 

[berkeman]

...and what are your calculated and measured Zo values for these lines? How long are your bus lines, and how many devices are connected? What are the operating frequencies, rise and fall times, and what devices are you using for the buffers?

 

[ConeOfIce]

To say we are heading into the weeds is an understatement.

Part of the issue with this is I don't what the RC stuff is for. This stuff was designed years ago while part of a different company that we took over, so I have no one to ask about as to why these decisions were made. But I agree, the design of this was piss-poor.

The circuit actually worked fine as the down-stream devices were just normal buffers, but because of a VERY poor out of stock decision, someone replaced them with the bus-hold circuits (TI's SN54LVTH244A btw).

I have to imagine the original intent of the buffer was just to get the logic levels back into the next part of the system.

I am not sure of the length or impedance of the lines. But I can tell you we got very similar results when we divvied up a test board that had MUCH shorter lines.

The system can have anywhere from 1-10 devices hooked up to the system. The issue happens when we have 6-10 devices hooked up.

This is a DC switch type of ordeal where the switch actually very rarely happens (why it must have taken so long for this problem to arrise). The problem only arrises when we go from a 1 to a 0. Meaning that the circuit is giving a current when 6-10 devices are hooked up of inbetween 500-750 uA.

The upstream buffer is Philips 74ABT125 and is spec'd to have a rise and fall time of 2.5ns with a Load of 50pF and 500 ohms.


Doing the proper engineering fix of changing up either the RC stuff or replacing the bus-holds is not a change we can do. The only thing we could do is mess around with the upstream buffer (hence the capacitor).

Sorry some of the responses are flaky,

Thanks a bunch!

 

[berkeman]

Ah, makes more sense now. First, try it with no RC at all, and only the 33 Ohm back termination resistor at the driver. Is that driver the only thing that drives the lines to the 1-10 receive gates? The series back termination resistor should be placed as close as possible to the output of that drive gate.

The "bus hold" circuit that listed (SN54LVTH244A) is a gate, so it takes a resistor along with that gate to form a bus hold/keeper circuit. The resistor goes at the output of the 244 gate, and the other side of the resistor is connected to the bus line and the input of the 244. The size of the resistor is generally chosen based on timing requirements and drive levels. The 500uA current that you cite is reasonable for a medium-speed system, and that would give a resistor of about 3V/500uA = 6kOhm.

As long as the driver is back-terminated (with a resistance equal to the difference between the PCB Zo and the output impedance of the drive gate), there should be minimal ringing on the bus.

If you have a Z-lead probe and a good oscilloscope, you can watch the ringing of the signals as you remove the RC, and verify that your signal integrity is good. Do you know what the failure is? Can you see ringing and double-switching? Or is it a level issue?

 

[ConeOfIce]

Thanks,

The thing is, is I cannot get rid of the RC section even though I'm sure that would fix it. The entire RC portion with the bus-hold are on large separate units that cannot not be tampered with.

For all new products, the whole issue has already been fixed, but this is too give a fix to some that are already out in the field. The area with the termination resistor and the buffer is the only section that can be tampered with. From an engineering point of view, it's not the greatest option, but from a business point of view, it's all we have.

And yes, this driver is the only thing driving all 1-10 Bus-holds.

Where do you see this information about an external resistor connecting the output of the circuit to the input. I was under the impression this was done internally by TI's Bus-Hold Ap-notes "SCLA015".

Also, we actually need 750uA, as it needs more current when going from low to high then high to low.

The original guess of putting a cap across that resistor was because it was believed it would help to drive a temporary reverse current (because of the bigger undershoot).

I have attached a snapshot of what it looks like at the bus-hold on either side of the termination resistor with the capacitor in parallel. At this time we used a 0.1uF cap, later when we moved it up to 1uF, the ringing considerably lowered (though the initial huge drop was still there). I don't totally understand why the ringing looks like this, as it almost has an RLC look to it, but the one spike is just considerably higher then the others.

I understand why increasing the resistor would have created a bigger bounce([261-33]/[261+33] = 0.78) , but I figured such a large capacitor would have negated it (due to being a short for long enough).

But the only thing we seem to see is ringing at the buffer end, and a level issue at the bus-hold end. I have added 2 more screenshots at the input to the bus-hold. The first was a pass with 4 RC+BH in parallel, and then second with 5 RC=BH in parallel. Once again, this was with the termination resistor at 261 ohms and a cap of 0.1 uF (by the time we put 1uF in, it would pass with all 10 in parallel).

Like I said, this fix worked very well, as we ran many tests on the actual system with absolutely no errors. We just want to understand exactly why it worked.
Like I mentioned before, we believe it has to do with temporarily removing the termination resistor from the circuit, the massive undershoot causing a bigger voltage drop and I guess maybe the lack of ringing.

 

[berkeman]

Ah, I'd missed the "H" part of the 244 part number and its significance. Interesting, I wasn't aware of the built-in bus hold capability like that. Learn something new every dang day...

But, it does seem like only one of the buffers on the bus needs to be a Hold type, doesn't it? It would serve as the keeper for the other 2-10 gattes. Also, since this bus is driven all the time by that one driver (it's never tri-stated, right?), then why include a bus keeper at all? Bus keepers are only meant for busses that get tri-stated with no driver on them. Does the circuit work if you get rid of the RC and use non-"H" input gates?

 

[ConeOfIce]

Haha, well I am glad I could help!

If you get rid of the bus-hold and use a normal buffer it works fine, and that was what the original design had (and all future designs). There is no reason to use the bus-hold, it was an over sight by an engineer saying they work in the exact same way as the normal buffer (whoops right).

If you got rid of the RC is would also work. However I discovered earlier today that it is put in, because the devices that have them are hot-swap, and this helps to avoide instantaneous changes.

And no, it is never tri-stated.

Upon discussing it with the guy who originally came up with the capacitor idea he was explaining to me that the capacitor charges and holds energy, and once the buffer drives low, it causes a reverse current to happen. The problem is, is that there is essentially no voltage across the capacitor (at steady state there is no current in the circuit other then leakage current which really doesn't add to much more then 50uA). So, this would cause a miniscule voltage difference across the capacitor so any charged up current it would release would also be miniscule.

It is very clear to me that this fix provides more reverse current to get it above the required 750uA, and that part of this fix is because we temporarily eliminate this resistor. The more I think about, the more I feel like this is the only reason why it is working, but don't know how to explain this to my boss.