VHDL Code: Testing Equality of Vectors


by user101
Tags: code, equality, testing, vectors, vhdl
user101
user101 is offline
#1
Dec1-07, 11:21 PM
P: 208
Hi all, I have the following code:

if (checkHR(7 downto 4) = HRH) and (checkHR(3 downto 0) = HRL)
and (checkMIN(7 downto 4) = MINH) and (checkMIN(3 downto 0) = MINL) then

SECL <= "0000";
SECH <= "0000";
MINL <= "1000"; -- set to 8888 to notify alarm has been set
MINH <= "1000"; -- set to 8888 to notify alarm has been set
HRL <= "1000"; -- set to 8888 to notify alarm has been set
HRH <= "1000"; -- set to 8888 to notify alarm has been set
where checkHR and checkMIN are 8 bit vectors (7 downto 0)... and SECL, SECH, MINL, MINH, HRL, and HRH are all 4 bit vectors (3 downto 0).

What I'm trying to do is check to see if the first four bits of checkHR is equal to HRH.

Can someone tell me whats wrong? I'm getting the error: Line 74. = can not have such operands in this context.
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antonantal
antonantal is offline
#2
Dec2-07, 04:29 PM
P: 219
Did you put the code inside a process? You can only use the "if" statement inside a process.
user101
user101 is offline
#3
Dec2-07, 10:56 PM
P: 208
Yes, it's in a process.

antonantal
antonantal is offline
#4
Dec3-07, 03:27 PM
P: 219

VHDL Code: Testing Equality of Vectors


In the portion of code that you posted there is no syntax error. There must be some conflicting code somewhere else. You should post the whole process. Also tell us which of SECL, SECH, MINL, MINH, HRL, HRH, checkHR and checkMIN, are signals and which are ports.


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