Capacitor type selection for power converter

[Ntip]

TL;DR Summary

I am lookin at capacitors for a switched capacitor converter, but I'm not sure what voltage rating to consider; AC or DC

I am looking at capacitor selection for a switched capacitor converter and I'm not sure which voltage rating to look for. I've was going to consider the DC rating since they're holding off a DC voltage, but they are subject to PWM excitation since they're switching between nodes at different voltages.

Are there any things that I should consider for a switched capacitor converter that may be overlooked by just simply picking considering the DC voltage rating RMS current rating?

 

[jim mcnamara]

Trying to be helpful here. I'm not an EE.

Your otherwise good question leaves out a lot of detail. From years of observing threads in the EE forums, if you want a concise answer instead of lots of questions, details fend off questions.

 

[hutchphd]

Summary:: I am lookin at capacitors for a switched capacitor converter, but I'm not sure what voltage rating to consider; AC or DC

Are there any things that I should consider for a switched capacitor converter that may be overlooked by just simply picking considering the DC voltage rating RMS current rating?

The DC rating is a peak rating and so needs to be for the peak to peak AC not the rms. Too big is always OK for voltage rating on Capacitor so be generous if space allows. And similarly smaller leakage is always better obviously.

 

[Baluncore]

I am lookin at capacitors for a switched capacitor converter, but I'm not sure what voltage rating to consider; AC or DC

I think you should link to or post the circuit schematic.

 

[Ntip]

Here are two simple schematic of switched capacitor circuits. Basically, the capacitors are connected in different series/parallel configurations to transfer charge from one capacitor to the next and create a higher voltage on the output (most of the time). During steady state, the capacitors are under a DC voltage except during switching transitions. During switching transitions going between series/parallel configurations, the voltages jumps from one voltage to another. I am wondering if there are any special considerations for these capacitors that are subject to this PWM-like excitation.

I don't think that it's as simple as the DC rating being the peak to peak AC and not the rms because I can ones that don't fit that scenario. I've linked a 450 Vdc, 84 Vac capacitor as an example. Another example also linked has a 50 Vdc, 40 Vac rating which doesn't follow the peak to peak AC idea.

A rough assumption is that it may have something to do with the dielectric strength varying between AC and DC excitation. If this is the case, then it should also be frequency dependent which would make me even more concerned with capacitor selection in switched capacitor circuits.

I understand AC will also have more dielectric loss but I wouldn't want to just assume that is the reason (or only reason) for the derating.

https://www.digikey.com/en/products/detail/panasonic-electronic-components/ECW-FD2W104KB/4271862
https://www.digikey.com/en/products/detail/vishay-beyschlag-draloric-bc-components/BFC237011125/502404?s=N4IgjCBcpgbFoDGUBmBDANgZwKYBoQB7KAbRAGYBOAJmoA54Cra66QmbqB2NgXQIAOAFyggAykIBOASwB2AcxABfArEoIQySOmz4ipEABYwYOpS7sjABkpVyIfiGGiJMhcoJhqNDVp24CYkgyajAAVnIrMIdBEUhxKTlFFXBve2hNVEwA-WCQanI6LkKYpziEt2TPSjNfLN1AgytS53jXJOUU6gNENAE0RGkhQklS6IyBKDBBScgwKysU%2BAzpABNRahsLWJdE9wIhAE8BHFE0LGQlJSA

 

[Baluncore]

Here are two simple schematic of switched capacitor circuits.

As I see it, there is no reverse bias or AC component on the capacitors.
If a drive failure or load fault could reverse bias a capacitor, then a parallel diode would prevent polarised capacitor damage.
Capacitor ESR need only be slightly less than the commutator switch resistance.

 

[rbelli1]

I've linked a 450 Vdc, 84 Vac capacitor as an example.

There is a de-rating on varying voltages on this capacitor where the peak to peak rating is only 240V (which corresponds to the 84VAC) and the zero to peak rating is 450V. I have never encountered this before. I can't find anywhere in the datasheet that explains this clearly.

This section may be trying to explain the peak to peak de-rating based on the following note under the specifications.

Another example also linked has a 50 Vdc, 40 Vac rating

This is a typo on Digikey's website. If you read the datasheet the capacitor is rated at 32VAC.

BoB

 

[DaveE]

These ratings are more complex than most people realize because the marketing people at the capacitor manufacturers are trying to match historical specifications as well as make it easy to select parts with simple numbers. So, what you really want to do is dig into the specifications a bit and figure out what you'll expose the part to vs. what it can tolerate as divined from a marketing specification.

So, here's what capacitors really care about:
1) Voltage polarity, if it's an electrolytic. I'm not going any deeper here, just don't run them "backwards".
2) Dielectric strength, i.e. peak voltage.
3) Internal temperature.

Temperature is the source of the complexity in specification. Usually for SMPS applications you really want to know the ESR and a current rating, these are often frequency dependent with temperature and lifetime derating. These determine the bulk of the capacitor heating. All of those AC specifications are really a crude way of estimating the current and thus the temperature. They think an average EE can't calculate this stuff, and they don't know your circuit, so they can't do it for you, so they guess. Those guesses are really useful when you are sorting through hundreds of potential parts, like a benchmark test. But for your final SMPS design you ought to verify that you aren't over heating the part or risking electrical breakdown.

Of course it can get more complicated than this, people can make a career out of designing, testing, and using capacitors. Many of those people are available to answer your questions as applications engineers working for the manufacturers, but you need to be patient about getting to them, they usually are shielded from simple or dumb questions.

 

[Ntip]

Capacitor ESR need only be slightly less than the commutator switch resistance.

Yes, the capacitors will not be reverse biased or have AC. I will be using film so that shouldn't be a problem anyway, I was really just hoping to find out if there were more things I should consider in a switched capacitor circuit due to the high dv/dt.

Why does the ESR only need to be slightly less than the commutator switch resistance? Of course lower will mean less losses but is there a reason just slightly less than the switch should be a maximum criteria for ESR?

 

[Ntip]

So, here's what capacitors really care about:
1) Voltage polarity, if it's an electrolytic. I'm not going any deeper here, just don't run them "backwards".
2) Dielectric strength, i.e. peak voltage.
3) Internal temperature.

Of course it can get more complicated than this, people can make a career out of designing, testing, and using capacitors. Many of those people are available to answer your questions as applications engineers working for the manufacturers, but you need to be patient about getting to them, they usually are shielded from simple or dumb questions.

2) the dielectric strength is part of what I was hoping someone may have some experience with. I know that dielectrics degrade more rapidly as the frequency increases. I guess the maximum voltage is rated for DC on these. The high dv/dt and PWM-like excitation is part of what led me to question if they should also be derated due to that use. Maybe it would fail in 80,000 hrs instead of 100,000, which isn't a big deal, I was just hoping to find out the nitty gritty of how they would be affected in general from this excitation.

I'll try reaching out to the manufacturers if they have any input. Thanks for the advice.

 

[Baluncore]

Why does the ESR only need to be slightly less than the commutator switch resistance?

You do not want the ESR of the capacitor to dominate the power loss.
Buying lower ESR capacitors will not make a big difference to performance.

 

[DaveE]

Why does the ESR only need to be slightly less than the commutator switch resistance?

Sorry, I don't understand that.
The dominant effects of ESR are heating of the capacitor and filtering effectiveness for high frequencies in low noise designs. In some designs it can also play a role in the closed loop dynamics by creating a zero in the transfer function.

 

[Ntip]

DavE, it was a comment that Baluncore made in one of the replies. I was wondering if it specifically introduced a RHP zero or created other stability challenges in a switched capacitor circuit since it was specifically mentioned. It looks like the transfer function for these can get pretty messy so I was hoping it was some type of convenient rule of thump for stability with SC circuits. I understand from the power loss and self heating perspective though.

 

[DaveE]

I was wondering if it specifically introduced a RHP zero

I don't think so, but it's been a while since I worried about that. Certainly not in buck topologies. Most normal PSs don't have that much closed loop bandwidth and/or they use good capacitors anyway.

OTOH, people make up lots of rules of thumb. I personally never heard one for this case.

 

[Tom.G]

I guess the maximum voltage is rated for DC on these. The high dv/dt and PWM-like excitation is part of what led me to question if they should also be derated due to that use. Maybe it would fail in 80,000 hrs instead of 100,000, which isn't a big deal, I was just hoping to find out the nitty gritty of how they would be affected in general from this excitation.

The first datasheet you linked to explains the limitation starting on page 9.
https://b2b-api.panasonic.eu/file_stream/pids/fileversion/998

The underlying reason is the internal hot-spot temperature of the capacitor. This is determined by the current flowing thru it. And of course the current is determined by the frequency, applied voltage, source impedance of the supply voltage, and ambient temperature. Much of that calculation can be simplified to the capacitor current.

The example given in the datasheet on pg. 9 paragraph 1.4 assumes a low impedance source and bases the the voltage limit on rated current and capacitor reactance. The example calculation picks a 40kHz frequency and a current of 2Amp. Current limitations are in the graphs an pg.10. From all this, it shows a maximum of 53V RMS applied to the capacitor to keep the current, and resulting temperature, within operating range.

The equivalent calculation for pulsed operation follows the above on pg.10.

Hope this helps!

Cheers,
Tom

 

[DaveE]

I know that dielectrics degrade more rapidly as the frequency increases.

I'm not sure that's true.

First it depends on what you mean by degrade.

If you mean performance, then yes, dielectric losses typically increase with frequency. This is a stable effect, it's not degradation in time. It doesn't change the dielectric.

If you mean reliability, then I think temperature is the primary driver of this. But, capacitor current (in many circuits) increases with frequency and thus the temperature of the dielectric increases.