VLSI Test Circuit: Fault Models & Examples Explained

[vead]

VLSI testing is process that is used to determine that chip is good or faulty

VLSI chip is tested by test equipment and some test circuit

can anybody tell me the example of some test circuit

actually I am confused I don't understand that fault model and test circuit are different or same things

 

[jedishrfu]

here's a presentation of VLSI test that may clarify some of your points:

http://www.ece.uc.edu/~wjone/intro.pdf

It shows various type of fault models, and testing methodology like BIST or boundary scan...

 

[vead]

here's a presentation of VLSI test that may clarify some of your points:

http://www.ece.uc.edu/~wjone/intro.pdf

It shows various type of fault models, and testing methodology like BIST or boundary scan...

I have read that pdf
actually I am confused I don't understand that fault model and test circuit are different or same things

 

[jedishrfu]

From my understanding, you create a test circuit (slide 8) and from that you inject a simple fault like what if the A input is stuck at zero then you apply an input signal and get a resultant output signal from your model.

When you apply the above input signal to the real circuit under test and you get the output signal above then you know it failed with the fault of the A input being stuck and in essence using the output to characterize the circuit's operation and identify its fault.

 

[alphy]

I can provide some clarification on VLSI testing and the role of fault models and test circuits. VLSI testing is indeed a crucial process in determining the functionality and reliability of a chip. It involves subjecting the chip to various tests and measurements using specialized equipment and test circuits.

A test circuit is a physical circuit designed specifically for testing a particular aspect or function of the chip. It is used to simulate various operations and inputs to the chip in order to detect any faults or errors. Some examples of test circuits include boundary scan, built-in self-test (BIST), and scan chains.

On the other hand, fault models refer to the theoretical models or assumptions used to describe the types of faults that can occur in a chip. These models are used to guide the design and implementation of test circuits, as they help identify the potential areas of failure in the chip.

In summary, fault models and test circuits are two different components of the VLSI testing process. Fault models provide a theoretical basis for identifying and detecting faults, while test circuits are physical circuits used to implement and execute the tests. Both are essential in ensuring the quality and reliability of VLSI chips.