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Experimental Physics I (NPTEL):- Lecture 15: Basic analysis (Contd.)

Experimental Physics I (NPTEL):- Lecture 15: Basic analysis (Contd.)

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Analytic number theory around torsion homology: Lecture 3 by Prof. Akshay Venkatesh

Analytic number theory around torsion homology: Lecture 3 by Prof. Akshay Venkatesh

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Differential Equations and Applications (NPTEL):- Lecture 19: Picard's Existence and Uniqueness Theorem 2

Differential Equations and Applications (NPTEL):- Lecture 19: Picard's Existence and Uniqueness Theorem 2

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Chemical Engineering Thermodynamics by Prof. M.S. Ananth (NPTEL):- Lecture 29: Simultaneous Relations

Chemical Engineering Thermodynamics by Prof. M.S. Ananth (NPTEL):- Lecture 29: Simultaneous Relations

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Chemical Engineering Thermodynamics by Prof. M.S. Ananth (NPTEL):- Lecture 30: Thermodynamic Consistency/ Reverse Osmosis

Chemical Engineering Thermodynamics by Prof. M.S. Ananth (NPTEL):- Lecture 30: Thermodynamic Consistency/ Reverse Osmosis

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Chemical Engineering Thermodynamics by Prof. M.S. Ananth (NPTEL):- Lecture 31: Miscellaneous topics in phase equilibria

Chemical Engineering Thermodynamics by Prof. M.S. Ananth (NPTEL):- Lecture 31: Miscellaneous topics in phase equilibria

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Chemical Engineering Thermodynamics by Prof. M.S. Ananth (NPTEL):- Lecture 32: Absorption Refrigeration

Chemical Engineering Thermodynamics by Prof. M.S. Ananth (NPTEL):- Lecture 32: Absorption Refrigeration

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Chemical Engineering Thermodynamics by Prof. M.S. Ananth (NPTEL):- Lecture 33: Summary of Classical Thermodynamics

Chemical Engineering Thermodynamics by Prof. M.S. Ananth (NPTEL):- Lecture 33: Summary of Classical Thermodynamics

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Chemical Engineering Thermodynamics by Prof. M.S. Ananth (NPTEL):- Lecture 34: Molecular basis of Thermodynamics I

Chemical Engineering Thermodynamics by Prof. M.S. Ananth (NPTEL):- Lecture 34: Molecular basis of Thermodynamics I

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Chemical Engineering Thermodynamics by Prof. M.S. Ananth (NPTEL):- Lecture 35: Molecular basis of Thermodynamics II

Chemical Engineering Thermodynamics by Prof. M.S. Ananth (NPTEL):- Lecture 35: Molecular basis of Thermodynamics II

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Course introduction; Negative feedback control

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Course introduction; Negative feedback control

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Negative feedback amplifier

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Negative feedback amplifier

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Step response, sinusoidal steady state response

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Step response, sinusoidal steady state response

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Loop gain and unity loop gain frequency; Opamp

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Loop gain and unity loop gain frequency; Opamp

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Opamp realization using controlled sources; Delay in the loop

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Opamp realization using controlled sources; Delay in the loop

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Negative feedback amplifier with ideal delay-small delays

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Negative feedback amplifier with ideal delay-small delays

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Negative feedback amplifier with ideal delay-large delays

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Negative feedback amplifier with ideal delay-large delays

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Negative feedback amplifier with parasitic poles and zeros

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Negative feedback amplifier with parasitic poles and zeros

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Negative feedback amplifier with parasitic poles and zeros; Nyquist criterion

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Negative feedback amplifier with parasitic poles and zeros; Nyquist criterion

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Nyquist criterion; Phase margin

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Nyquist criterion; Phase margin

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Phase margin

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Phase margin

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Single stage opamp realization

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Single stage opamp realization

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Two stage miller compensated opamp - 1

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Two stage miller compensated opamp - 1

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Two stage miller compensated opamp - 2

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Two stage miller compensated opamp - 2

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Two and three stage miller compensated opamps; Feedforward compensated opamp - 1

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Two and three stage miller compensated opamps; Feedforward compensated opamp - 1

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Feedforward compensated opamp - 2

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Feedforward compensated opamp - 2

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Feedforward compensated opamp - 3

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Feedforward compensated opamp - 3

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Feedforward compensated opamp - 4; typical opamp data sheet

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Feedforward compensated opamp - 4; typical opamp data sheet

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Opamp offset and CMRR; Transimpedance amplifier using an opamp

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Opamp offset and CMRR; Transimpedance amplifier using an opamp

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Components available in a CMOS process

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Components available in a CMOS process

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- MOS transistors-basics

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- MOS transistors-basics

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- MOS transistors-parasitics, mismatch

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- MOS transistors-parasitics, mismatch

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- MOS transistors-mismatch, speed

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- MOS transistors-mismatch, speed

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Noise in resistors

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Noise in resistors

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Noise in MOS transistors; Input and output referred noise

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Noise in MOS transistors; Input and output referred noise

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Noise scaling; Basic amplifier stages-Common source, common gate

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Noise scaling; Basic amplifier stages-Common source, common gate

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Basic amplifier stages-Common drain; Frequency response of amplifiers

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Basic amplifier stages-Common drain; Frequency response of amplifiers

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Common source amplifier frequency response; Differential amplifier

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Common source amplifier frequency response; Differential amplifier

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Differential and common mode half circuits; Differential pair with active load

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Differential and common mode half circuits; Differential pair with active load

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Differential pair with current mirror load

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Differential pair with current mirror load

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Single stage opamp characteristics

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Single stage opamp characteristics

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Opamp with single and dual supplies; Single stage opamp tradeoffs

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Opamp with single and dual supplies; Single stage opamp tradeoffs

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Telescopic cascode opamp

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Telescopic cascode opamp

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):-Telescopic cascode opamp; Folded cascode opamp

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):-Telescopic cascode opamp; Folded cascode opamp

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Folded cascode opamp

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Folded cascode opamp

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Two stage opamp

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Two stage opamp

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Two stage opamp; Three stage and triple cascode opamps

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Two stage opamp; Three stage and triple cascode opamps

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Common mode rejection ratio; Example

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Common mode rejection ratio; Example

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Fully differential circuits

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Fully differential circuits

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Fully differential single stage opamp

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Fully differential single stage opamp

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Common mode feedback

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Common mode feedback

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Fully differential single stage opamp

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Fully differential single stage opamp

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Fully differential two stage opamp; Fully differential versus pseudo-differential

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Fully differential two stage opamp; Fully differential versus pseudo-differential

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Circuit simulators and analyses

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Circuit simulators and analyses

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Phase locked loop as frequency multiplier

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Phase locked loop as frequency multiplier

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Phase domain model

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Phase domain model

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Type I PLL transfer function and reference feedthrough

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Type I PLL transfer function and reference feedthrough

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Type II PLL

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Type II PLL

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Type II PLL transfer functions; Implementation

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Type II PLL transfer functions; Implementation

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Type II PLL-extra poles; Random noise in a PLL

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Type II PLL-extra poles; Random noise in a PLL

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Oscillator phase noise

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Oscillator phase noise

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- PLL phase noise; LC and ring Oscillators

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- PLL phase noise; LC and ring Oscillators

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Generating PTAT and constant MOS gm bias currents

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Generating PTAT and constant MOS gm bias currents

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Reducing supply sensitivity; Bandgap voltage reference

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Reducing supply sensitivity; Bandgap voltage reference

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Fractional bandgap reference; Low dropout regulators

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Fractional bandgap reference; Low dropout regulators

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Low dropout regulators; Continuous-time active filters

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Low dropout regulators; Continuous-time active filters

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Continuous-time active filters - 1

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Continuous-time active filters - 1

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Continuous-time active filters - 2

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Continuous-time active filters - 2

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Discrete-time active filters

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Discrete-time active filters

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Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Transistor sizing in practice; Course summary

Analog IC Design by Dr. Nagendra Krishnapura (NPTEL):- Transistor sizing in practice; Course summary

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Advanced VLSI Design (NPTEL):- Lecture 01: Historical Perspective and Future Trends in CMOS VLSI Circuit and System Design - Part I

Advanced VLSI Design (NPTEL):- Lecture 01: Historical Perspective and Future Trends in CMOS VLSI Circuit and System Design - Part I

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Advanced VLSI Design (NPTEL):- Lecture 02: Historical Perspective and Future Trends in CMOS VLSI Circuit - Part II

Advanced VLSI Design (NPTEL):- Lecture 02: Historical Perspective and Future Trends in CMOS VLSI Circuit - Part II

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Advanced VLSI Design (NPTEL):- Lecture 03: Logical Effort - A way of Designing Fast CMOS Circuits 1

Advanced VLSI Design (NPTEL):- Lecture 03: Logical Effort - A way of Designing Fast CMOS Circuits 1

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Advanced VLSI Design (NPTEL):- Lecture 04: Logical Effort - A way of Designing Fast CMOS Circuits 2

Advanced VLSI Design (NPTEL):- Lecture 04: Logical Effort - A way of Designing Fast CMOS Circuits 2

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Advanced VLSI Design (NPTEL):- Lecture 05: Logical Effort - A way of Designing Fast CMOS Circuits 3

Advanced VLSI Design (NPTEL):- Lecture 05: Logical Effort - A way of Designing Fast CMOS Circuits 3

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Advanced VLSI Design (NPTEL):- Lecture 06: Power Estimation and Control in CMOS VLSI circuits 1

Advanced VLSI Design (NPTEL):- Lecture 06: Power Estimation and Control in CMOS VLSI circuits 1

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Advanced VLSI Design (NPTEL):- Lecture 07: Power Estimation and Control in CMOS VLSI circuits 2

Advanced VLSI Design (NPTEL):- Lecture 07: Power Estimation and Control in CMOS VLSI circuits 2

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Advanced VLSI Design (NPTEL):- Lecture 08: Low Power Design Techniques - Part 1

Advanced VLSI Design (NPTEL):- Lecture 08: Low Power Design Techniques - Part 1

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Advanced VLSI Design (NPTEL):- Lecture 09: Low Power Design Techniques - Part 2

Advanced VLSI Design (NPTEL):- Lecture 09: Low Power Design Techniques - Part 2

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Advanced VLSI Design (NPTEL):- Lecture 10: Arithmetic Implementation Strategies for VLSI - Part 1

Advanced VLSI Design (NPTEL):- Lecture 10: Arithmetic Implementation Strategies for VLSI - Part 1

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Advanced VLSI Design (NPTEL):- Lecture 11: Arithmetic Implementation Strategies for VLSI - Part 2

Advanced VLSI Design (NPTEL):- Lecture 11: Arithmetic Implementation Strategies for VLSI - Part 2

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Advanced VLSI Design (NPTEL):- Lecture 12: Arithmetic Implementation Strategies for VLSI - Part 3

Advanced VLSI Design (NPTEL):- Lecture 12: Arithmetic Implementation Strategies for VLSI - Part 3

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Advanced VLSI Design (NPTEL):- Lecture 13: Arithmetic Implementation Strategies for VLSI - Part 4

Advanced VLSI Design (NPTEL):- Lecture 13: Arithmetic Implementation Strategies for VLSI - Part 4

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Advanced VLSI Design (NPTEL):- Lecture 14: Interconnect aware design: Impact of scaling, buffer insertion and inductive peaking

Advanced VLSI Design (NPTEL):- Lecture 14: Interconnect aware design: Impact of scaling, buffer insertion and inductive peaking

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Advanced VLSI Design (NPTEL):- Lecture 15: Interconnect aware design: Low swing and Current Mod-e signaling

Advanced VLSI Design (NPTEL):- Lecture 15: Interconnect aware design: Low swing and Current Mod-e signaling

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Advanced VLSI Design (NPTEL):- Lecture 16: Interconnect aware design: capacitively coupled interconnects

Advanced VLSI Design (NPTEL):- Lecture 16: Interconnect aware design: capacitively coupled interconnects

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Advanced VLSI Design (NPTEL):- Lecture 17: Introduction to Hardware Description Languages

Advanced VLSI Design (NPTEL):- Lecture 17: Introduction to Hardware Description Languages

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Advanced VLSI Design (NPTEL):- Lecture 18: Managing concurrency and time in Hardware Description Languages

Advanced VLSI Design (NPTEL):- Lecture 18: Managing concurrency and time in Hardware Description Languages

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Advanced VLSI Design (NPTEL):- Lecture 19: Introduction to VHDL

Advanced VLSI Design (NPTEL):- Lecture 19: Introduction to VHDL

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Advanced VLSI Design (NPTEL):- Lecture 20: Basic Components in VHDL

Advanced VLSI Design (NPTEL):- Lecture 20: Basic Components in VHDL

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Advanced VLSI Design (NPTEL):- Lecture 21: Structural Description in VHDL

Advanced VLSI Design (NPTEL):- Lecture 21: Structural Description in VHDL

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Advanced VLSI Design (NPTEL):- Lecture 22: Behavioral Description in VHDL

Advanced VLSI Design (NPTEL):- Lecture 22: Behavioral Description in VHDL

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Advanced VLSI Design (NPTEL):- Lecture 23: Introduction to Verilog

Advanced VLSI Design (NPTEL):- Lecture 23: Introduction to Verilog

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Advanced VLSI Design (NPTEL):- Lecture 24: FSM + datapath (GCD example)

Advanced VLSI Design (NPTEL):- Lecture 24: FSM + datapath (GCD example)

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Advanced VLSI Design (NPTEL):- Lecture 25: FSM + datapath (continued)

Advanced VLSI Design (NPTEL):- Lecture 25: FSM + datapath (continued)

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Advanced VLSI Design (NPTEL):- Lecture 26: Single Cycle MMIPS

Advanced VLSI Design (NPTEL):- Lecture 26: Single Cycle MMIPS

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Advanced VLSI Design (NPTEL):- Lecture 27: Multicycle MMIPS

Advanced VLSI Design (NPTEL):- Lecture 27: Multicycle MMIPS

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Advanced VLSI Design (NPTEL):- Lecture 28: Multicycle MMIPS â FSM

Advanced VLSI Design (NPTEL):- Lecture 28: Multicycle MMIPS â FSM

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Advanced VLSI Design (NPTEL):- Lecture 29: Brief Overview of Basic VLSI design Automation Concepts

Advanced VLSI Design (NPTEL):- Lecture 29: Brief Overview of Basic VLSI design Automation Concepts

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Advanced VLSI Design (NPTEL):- Lecture 30: Netlist and System Partitioning

Advanced VLSI Design (NPTEL):- Lecture 30: Netlist and System Partitioning

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