Recent content by bizuputyi

I know this is a shortcut but it is perfectly acceptable to produce this...

Hi Birchyuk, Try this: a_n = \frac{1}{\pi} \int sinxcosx.dx + \frac{1}{\pi} \int sinxcosx.dx Insert your limits and put the equation in wolfram or mathlab. What do you get? 'V' won't make any difference as long as it's 1 but to be accurate 'V' should also be in the equation.

Ok, I see. In that case we don't assume that time delay 1,4 + time delay two NANDs = time delay 2,4. Also to achieve Q = 0 and ~Q = 1 with clock falling to zero the delay of the two NANDs must be less than gate 2 and 3. And delay of 1,4 + NANDs > 2,3. Is that right?

That makes sense to me nicely. They specifically say that gate 1 and 4 switch faster than 2 and 3. If just assuming that switching time of 1 and 4 plus the two inverters equal to the time of 2 and 3, which case would happen when the clock goes to zero?

They ask to explain with the two inverters inserted in why Q becomes zero and ~Q becomes 1 when the clock reverts to zero. So, again without the two inverters when clock reverts to zero, Q becomes 1 and ~Q becomes zero and with the inverters in this is the other way round. Why is this the case...

Homework Statement The question states that when S = R = 1 and clock = 1, both outputs are 1. When clock goes to zero, Q becomes 1 and ~Q becomes zero. But if two NAND gate inverters are placed between ~Q and the input of gate 3, when clock goes to zero, Q becomes zero and ~Q becomes 1. The...

What I meant is that an AND or OR gated cannot be derived by using only XOR gates. We can however make an inverter out of a XOR gate by connecting constant high to one of its input but I can't see any possible way to get either AND or OR from only XORs. To account for that I would say XOR gives...

Is it correct that AND and OR cannot be derived from XOR at all?

Right, that seems a good phrase to google with. Thank you.

Thank you, it starts making sense now, so changing excitation will alter stator current. I think my phasor diagrams show all that, don't they?

Homework Statement Explain how the synchronous machine stator current can be varied if the load is constant. Justify your answer with phasor diagrams. 2. The attempt at a solution If load is constant then load angle, the angle between induced e.m.f. and terminal voltage remains the same...

Thank you.

Right, okay. In that case: 5dBmV + 60 = 65dBuV ##SNR_{in dB} = 65 - 20 = 45dB## ##SNR_{out dB} = SNR_{in dB} - noise figure = 45 - 6 = 39dB## I get the same results. Where am I mistaken?

Homework Statement Hello everyone. A 4-way TV antenna amplifier has the following specifications: Bandwidth = 40-862Mhz Gain = 20dB Noise figure = 6 dB Max output = 85dBuV Input impedance = output impedance = 75 ohm Question 1: Calculate the required voltage on the input of the amplifier to...

I believe I sorted out. The thread may be closed. Thank you.