Homework Statement
So there are 4 masses in a line. They are connected by 3 springs between them, denoted by k_12 & l_12 (spring coefficient + natural extension length), k_23 & l_23, etc.
Homework Equations
Write down the f = ma equations of motion for all 4 masses.
The Attempt at...
Not sure if this is the right forum, but I'm an electrical engineer studying controls so here goes.
Here's my background on what I know. Lead or lag compensators generally have the form C(s) = K*(s+z)/(s+p), i.e. the controller has a DC gain and introduces a pole-zero pair. In the case of a...
thanks for the reply es1.
So because the PMOS is on but not connected to any load we must have V_o = Vdd. I guess for the case of a parasitic capacitance from V_o to ground this doesn't affect the DC analysis either, thus keeping it in triode mode.
I think I get it, thanks again.
Hello,
I have a question about how to analyze the CMOS inverter (this circuit: http://www.cs.umass.edu/~weems/CmpSci635A/Lecture2/image10.gif ). Just to clarify, the input voltage is connected to both gates, and the PMOS on top has its source connected to Vdd. The NMOS on the bottom has its...