1. Each differential pair must pass through a separate hole in all the other layers.
2. Look up the data on the differential outputs and inputs of the chips being used. Those differential signals will be on adjacent pins. If possible, drop the signals directly from their solder pads to the other side of the PCB.
3. The two vias will start by being circular holes, drilled in the PCB. They will then be plated to become a balanced cylindrical transmission line. Look up the differential impedance equations for such a geometry. You know your required impedance, so knowing the via drill size you can calculate the centre separation for the PCB material Er you are using.
4. Work out the dimensions of the parallel tracks on the surface of the PCB material with Er, that will make a differential transmission line with the required impedance. Find the equation for line impedance, if you can't, don't use that geometry line, because no one else does.
5. Start by simulating one pair of terminated tracks on the PCB surface, then with a two-via transmission line near the middle. The test signal should be a differential step pulse, to a termination resistor at the far end. Look at the TDR signal, and try to get a flat response that shows no differential impedance steps between the vias, surface transmission line, and the termination resistor.
6. Use the simulated TDR to work out how to feather or juggle, the surface connections to the via, that will hide the 90° junctions, as there will be a different lump of capacitance between tracks per inductance of track, at that turn.
I know it is old, and ECL is a fun differential logic, but download a copy for bedtime reading of the "Motorola MECL System Design Handbook". Chapters 2, 3, and 7 are important. Learn to think like a signal.
https://dn721801.ca.archive.org/0/i..._Motorola_MECL_System_Design_Handbook_4ed.pdf