Choosing a pulse capacitor, ESR vs reactance at frequency

[artis]

While going through the catalogues I started to wonder, typically lower ESR caps cost more, but if I need the cap for DC smoothing , to filter out unwanted AC ripple, then I put that cap across my DC rails +-. Now so far so good.
It's ability to filter out the AC ripple will be directly related to it's resistance to the AC current at that particular ripple frequency.

Now in most cases the calculated reactance of the capacitors in question is higher than the ESR rating of them.

Let me throw in an example. A half bridge SMPS working at 50khz, so on the secondary side after bridge diodes there will be a 100 khz ripple.
Now let's say that my capacitor has a ESR value of 5 miliohms, but the reactance of that capacitor at that frequency is about 23 miliohms (a 70uF cap)

So my thinking/question is this, is it worth to go for a ESR rating (in ohms) that is below the rating of reactance (in ohms) within the planned frequency range?

The way I understand it is that the maximum current through the capacitor at a particular frequency and voltage will be limited by either it's reactance or it;s ESR whichever happens to be highest at those values?

So if reactance is typically at least twice as high as the ESR then is it worth to have such low ESR?

 

[Baluncore]

The ESR will increase the capacitor voltage during the charge phase, then reduce the voltage during the discharge phase. The I²R developed in the ESR will heat the capacitor. Capacitive reactance does not heat the capacitor.

It is hard to consider the reactance of a capacitor when it is subject to a pulse waveform.

You need to draw a representative schematic for that stage of the regulator and put some numbers on the current and duty cycle, so it can be modeled.

 

[artis]

The ESR will increase the capacitor voltage during the charge phase, then reduce the voltage during the discharge phase.

I guess the other way of saying this would be that "less current gets through per higher ESR"

The I²R developed in the ESR will heat the capacitor.

Most definitely.
Although for my application this shouldn't be a problem since the AC ripple is no more than 1 to 1.5 volts.
The problem is that it's spiky so would need a very low resistance path or some clever filter to attenuate. Before I put in inductors and filters, I want to try the capacitor smoothing.
I plan to add some polypropylene low ESR caps across my DC rails right parallel to the electrolytics.

Although you are correct that specific application would need specific numbers to model I guess the general idea is still that the lower the reactance in this application the better, since more of the ripple current will get through and be smoothed out.

But does the connection still stand that if your reactance at a particular frequency say 100 khz is larger than your ESR, then the limit factor for maximum current through the cap will not be ESR but instead reactance?

 

[Dullard]

I agree with Baluncore. To add a bit more detail: The 'Ripple Current' rating of a capacitor is a result of the ESR and the thermal properties of the capacitor. In applications where there are significant in/out currents, the power dissipation in the ESR (and associated temperature increase) can destroy the capacitors of the unwary. That's (typically) where ESR is a factor. If money and space are not important, low ESR is always better than high ESR.

As a practical matter, 'calculated' values of reactance aren't as useful as the impedance/freq information provided in the data sheet for your capacitor. Depending on the capacitor technology and the frequencies involved, the difference can be considerable.

 

[Baluncore]

I guess the other way of saying this would be that "less current gets through per higher ESR"

The inductor in a SMPS will dump a predetermined current into the capacitor. The voltage on the capacitor will ramp up during the charging phase, but will also have a step added due to the charge current through the ESR.

But does the connection still stand that if your reactance at a particular frequency say 100 khz is larger than your ESR, then the limit factor for maximum current through the cap will not be ESR but instead reactance?

The magnetic field in the inductor decides the current that will be dumped into the capacitor.

 

[Baluncore]

The voltage step at the start of the charge phase will be proportional to the ESR. That is when the outward load current is replaced by the inward charge current.

If the unwanted spike is at the start of the capacitor charge phase, then the cause is ESR. If the highest capacitor voltage is at the end of the charge phase, the cause is insufficient capacitance. You need to balance those two.

The best way to remove a step is to employ a low-pass Pi filter. Since the transition step has much higher frequency harmonics than the switching rate of the SMPS, it can be filtered efficiently by an LC stage following the reservoir capacitor.