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Circuits involving Kirchoff's law

  1. May 8, 2013 #1
    1. The problem statement, all variables and given/known data

    Determine the currents I_1,I_2,I_3 given the information below. Note that the directions of the currents are drawn by myself. All other info was given at start.

    http://i.imgur.com/Pw2KK3O.jpg

    2. Relevant equations

    Kirchoffs law



    3. The attempt at a solution

    Given the circuit diagram with attached directions of currents, we have the following equations:

    I_1+I_2=I_3

    Loop abcda:

    10-6I_2-2I_1=0

    Loop befcb:

    4I_1+6I_2-24=0

    We have now a system of equations which is solved by Gausselimination giving the wrong solutions(both wrong and negative).
     
  2. jcsd
  3. May 8, 2013 #2

    gneill

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    Staff: Mentor

    In your loop abcda equation, the R3 potential change does not respect the direction you've drawn for the current I1. You might want to pencil-in the polarities of the potential changes on the resistors to reflect your choices for current directions before you begin to write the KVL loop equations.

    Your equation for loop befcb contains a term for I1 which does not appear in that loop.
     
  4. May 8, 2013 #3

    collinsmark

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    [Red (and Blue) color mine.]

    See above in red. The minus sign of that term in red, in that loop, is inconsistent with the signs of the other terms in the loop, given the way you defined your loop and current definitions.

    [Edit: gneill beat me to the punch again. :smile:]

    [And as gneill points out, there isn't even an I_1 in the befcb loop.]
     
    Last edited: May 8, 2013
  5. May 9, 2013 #4

    Alright. I see now that the negative sign is indeed wrong and should be positive. However I'm not sure which current flows through R_1 if not I_1. Here is my idea of the flows of the currents:

    From the 14V-battery flows the current I_1 through the nodes e-b-a-d-c-f-back to battery. (Is not half of the current flowing to the 10V-battery at node b though?)

    From the 10V-battery flows the current I_2 through the nodes c-d-a-b-back to battery.(Again, is not half of I_2 flowing up to e?)

    At c meets I_1 and I_2, creating I_3 but unsure in what direction I_3 should be moving so I made an assumption that it moves to f.
     
  6. May 9, 2013 #5

    gneill

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    On your diagram there are two junctions (nodes) where currents can join or split. These are located at labels b and e. Away from these nodes currents cannot change because there is only one path (series connections) for the current to follow; If you trace a path from one node to the other, the current along that path must be the same from start to finish.

    Now, you've placed current labels ##I_1, I_2, I_3## on the three paths that run between the two nodes b and e. These will be the currents that flow through each component in the respective branches. So, is R1 in the I1, I2, or I3 branch?
     
  7. May 9, 2013 #6
    In the I_3 branch, but I still fail to see why(I got correct solutions using I_3). You say that there are only two nodes where currents can join/split, b and e. But that depends on which direction I_2 takes at c; to d or f? How can I know that? And what about c? That is where I_1 and I_2 joins, so there are three nodes right.

    From my point of view, I_3 "begins" at c where I_1 and I_2 join and flows through f and then reaching the minus pole at the 14V-battery. And THATS IT. From the positive pole flows a different current, namely I_1, to c and same thing is repeated. Is this correct? Apparently not.
     
  8. May 9, 2013 #7

    gneill

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    My mistake... I was looking at a tiny image of your diagram and mistook the letter ordering. The two nodes are b and c. e is not a junction of three or more branches.
    No, not correct. Unless there's a junction where currents can split/join, the current is unchanged. The current that flows into one side of ANY component (including sources) is identical to the current flowing out of that component. All components connected in series share the same current.
     
  9. May 9, 2013 #8
    Okay, thanks. So that means that I_3 flows c-f-e-b and then join I_2 from a opposite direction which gives I_3-I_2=I_1. I_1 flows b-a-d-c meeting I_2 and becomes I_3. Good!

    But is this the only way to notice that I_2 flows through d instead of c? Or how can I know that it does not even split; (1/2)I_2 flows to d and (1/2)I_2 flows to f..?

    Many questions since I'm new to this.
     
    Last edited: May 9, 2013
  10. May 9, 2013 #9

    gneill

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    Usually, by inspection alone, all you can say is that the sum of the currents entering a junction must equal the sum of the currents leaving that junction. Without analyzing further, you cannot say that half of a given current will end up going one way or some other way at the junction.

    There's no rule that says that currents must divide in half when they split, or in thirds, etc. The ratios depend upon the values of the components in the circuit. That's why you end up writing and solving simultaneous equations that describe the circuit, so that the balances can be found.
     
  11. May 14, 2013 #10
    Hey gneill, I was thinking about this since I had an other problem not too long ago asking for the current passing through one resistor and I solved it by just dividing the total current by 2. See this attached picture;

    cLPXnxT.png

    Is this only possible if we have the same resistors in a circuit? It is also mentioned that this circuit is idealized, what does that actually mean?
     
  12. May 14, 2013 #11

    gneill

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    In this case the two upper resistors are in parallel and they are of equal value. Being in parallel, they must have identical potential difference across them. Being of identical resistance with the same potential difference they must conduct the same amount of current.

    Note that the bottom resistor could have a different value and this would not change the fact that the current will split evenly between the upper two resistors. Only the total current will change.

    When a circuit is said to be idealized, it generally means that all components are ideal: all wiring is perfectly conductive and everything is without stray inductance or capacitance; all components have exact values and behave precisely as their mathematical descriptions dictate under all conditions.
     
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