Common-drain small signal analysis with C1 feedback capacitor

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So I have this VCO for which I'm trying to calculate the characteristic equation for, vo/vi. Image of this and the small circuit equivalent attached.

I've also attached a simpler (in my opinion) common-source small signal equivalent to express that representation of the output, for instance, is rather intuitive in this case. We see an equivalent impedance (parallel resistors) with a current through them (negative polarity relative to Vo).

In other words, I can't intuitively understand what is going on in the common-drain case. We have an equivalent impedance at the output (R parallel with C2), but there is a transversal component, C1, which is throwing me off badly. I suppose I'm looking for key words or hints that may give me a little more insight into this calculation.
Some specific questions:
-Is our input here (Vi) Vg or Vgs?
-The output (Vo) I would call Vs, or similarly Vsd since the drain is (dynamically) grounded.
 
Attachments
  • Circuit schematic of an LC oscillator stage: a MOSFET with drain at Vdd, capacitors C1, C2 and C3 and inductor L in a ladder network, resistor R to ground at the source output.
    VCO.PNG
    9.2 KB · Views: 525
  • Small-signal equivalent circuit of a common-drain amplifier feedback network: a dependent current source id = gm vgs, load resistor R, capacitors C2, C1 and C3, inductor L1, with nodes labelled s, d, g, vs, vg and vgs.
    smallsignal.PNG
    3.5 KB · Views: 528
  • Small-signal equivalent circuit of a common-drain MOSFET stage: signal source with Rsig, input node with Rin and Rg, gate-source voltage vgs, transconductance gmvgs, output resistance ro, drain load RD, RL, output vo and Rout.
    CommonSource.PNG
    8.7 KB · Views: 526

Discussion

To understand this oscillator, you need to look at the tuned circuit on its own.

Consider a signal source feeding the tuned circuit as in the following diagram:

Schematic of a tuned circuit with two 2000 pF capacitors, a 3 uH inductor L and a resistor R, beside a red bell-shaped output-versus-frequency curve peaking at 3.5 MHz.


This produces a peak in output at about 3.5 MHz as shown. I verified this by building it.

Now if this output was connected to the gate of a suitably biased source follower, the FETwould feed almost the same input to its output at some power gain. This would then act as the input to this circuit.

As there is a voltage gain here in the tuned circuit, and some rapid phase shifts, the input to the FET would keep rising and produce oscillation when the gate voltage is in phase with the source voltage.
 
vk6kro said:
Now if this output was connected to the gate of a suitably biased source follower, the FETwould feed almost the same input to its output at some power gain. This would then act as the input to this circuit.

First thing I noticed was your input/output in reversed order to how I was looking at it, but that's what you're referring to when you say "this would then act as the input", right?

If I'm going to do it the textbook way, in which I find the loopgain as the product of the open-loop gain * beta-network gain, the b-network is everything external to the FET, correct? Including the resistor, I mean.
 
I'm not sure you could model this like a normal amplifier.

The FET has a simple role in the operation of the circuit, although there has to be power gain, of course, for the oscillation to happen.

The output of a FET as a source follower is in phase with the gate voltage and about 90% of the gate voltage in amplitude.
It is also at a much lower impedance than the gate, and it needs to be in this circuit because the tuned circuit looks like a series tuned circuit from the source viewpoint. So, it is low impedance at resonance.

Anyway, the driving power for the tuned circuit comes from the source of the FET. The tuned circuit produces a stepup in voltage that more than compensates for the 0.9 fractional gain of the FET. So, oscillation is possible, provided the gate signal can be in phase with the source voltage.

A practical version of this circuit has to include a diode from gate to ground. This generates a negative voltage which drives the FET toward cutoff and limits the amplitude of the oscillation. This gives a cleaner sinewave out.
 
vk6kro said:
...the tuned circuit looks like a series tuned circuit from the source viewpoint.

If from the tuned circuit you're excluding the capacitor in parallel with the resistor, then I can see how the rest is in series, yes.

I say this because of what happens at the junction of both capacitors:


Circuit schematic of a Colpitts-style ladder network: an inductor labelled L 3 uH on the left branch, three 2000 pF capacitors, output at top right, input V with resistor R at bottom right, and currents I1 and I2 marked by arrows.


A practical version of this circuit has to include a diode from gate to ground. This generates a negative voltage which drives the FET toward cutoff and limits the amplitude of the oscillation. This gives a cleaner sinewave out.

...or a variable capacitor in series with the inductor?


Thank you for the words, really provided some insight.
 
Last edited:
More clearly, what is the tuned circuit in this case?

I have an oscillating frequency condition which must be satisfied for the whole characteristic equation, which is a function of the inductor and all three capacitors.

What's not clear to me is if the other "tuned" circuit, the branch with inductor L and variable capacitor C3, must satisfy its own resonant frequency condition as well? Should it be treated separately as well as in conjunction?
 
The coil resonates with whatever capacitance is across it. In this case, that is the 3 capacitors in series.

This is not affected by how you drive it or by where you take output from it, as long as you don't add extra reactance to the circuit.

It is tempting to classify these circuits as series resonant or parallel resonant, but the difference is only in where you look at it.

Circuit schematic: a Signal Generator box connects to a loop containing a dashed-plate capacitor labelled C in parallel with a variable capacitor and an inductor labelled L in series.


In the above circuit, you would say the tuned circuit is series resonant. But it is very dependent on the output impedance of the signal generator. If this is 600 ohms, you may not even see a resonance dip.
Putting a capacitor across the signal generator allows the tuned circuit to resonate properly. So the circuit only resonates properly if it has a complete circuit of capacitors across it.
 
vk6kro said:
The coil resonates with whatever capacitance is across it. In this case, that is the 3 capacitors in series.

Putting a capacitor across the signal generator allows the tuned circuit to resonate properly. So the circuit only resonates properly if it has a complete circuit of capacitors across it.

This concept isn't immediately clear to me. I have textbooks and the internets at my disposal, what topic would you recommend I review to help me understand this?
 
I will have a look for some references. Look for pi networks.

Just to show the effect of using tuned circuits like this, I did a simulation that shows the substantial voltage stepup you can obtain:

Schematic of a series RLC circuit: voltage source V1 with R1 = 1000 in series, feeding node C1 with a 1000 capacitor to ground, then inductor L1 = 1 uH, then capacitor C2 = 200 to ground.


The capacitor values are in pF. The signal generator at left is generating sinewaves with 2 volts amplitude.

Simulated frequency response plot with two resonance peaks near 12.33 MHz: the black curve (V[n003]) peaks at about 10 V, the magenta curve (V[n002]) at about 2 V, over 11.90 MHz to 12.75 MHz.


This is the result. The purple line is the voltage across C1. The black line is the voltage across C2.
 
vk6kro said:
I will have a look for some references. Look for pi networks.

Just to show the effect of using tuned circuits like this, I did a simulation that shows the substantial voltage stepup you can obtain:

View attachment 22613

The capacitor values are in pF. The signal generator at left is generating sinewaves with 2 volts amplitude.

View attachment 22614

This is the result. The purple line is the voltage across C1. The black line is the voltage across C2.

Wow, that's pretty cool. Good idea, I should probably explore some of these simpler circuits in the simulator.

So am I correct in thinking this C1 in your diagram is equivalent to the C1 + C2 series capacitances in my circuit? Thanks a bunch for your input.
 
I find simulators very addictive and it is tempting just try one more thing.

I put in this circuit:
Circuit schematic: sine source V1 in series with resistor R1 (1000) feeds node with C1 (200 pF) to ground, then series C3 (200 pF) and inductor L1 (1 uH) to C2 (50 pF) returning to ground.

into the simulator

And got this output:
Log-scale plot of three voltage curves against frequency from 19 MHz to 29 MHz, with two sharp dips near 22.8 MHz and 25.1 MHz and a peak near 27.5 MHz.


I have shown a logarithmic plot to show the sharp series resonances at the left.
The main output is at about 27.5 MHz.
Blue is across C1. Black is between C3 and L1. This would be the gate of your FET.
Purple is across C2

C2 has to be smaller than C1 and C3 to get a voltage stepup at the gate.

Lowering the impedance of the signal generator to 1 ohm (which would be more like the source follower output in your oscillator) gives a classic series resonance:
Log-scale plot of three curves against frequency from 22 MHz to 27 MHz: a red curve peaking near 26 MHz, a green curve with a sharp dip near 22.6 MHz and a peak near 25.5 MHz, and a white curve with a sharp dip near 25.5 MHz.

Note that output of nearly 300 volts across C2 for a 2 volt input. C1 is effectively shorted out. The green plot would be your gate voltage.
 

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