# Designing a 4-bit non-sequential synchronous counter

1. Oct 7, 2012

1. The problem statement, all variables and given/known data

I am working on a 16:4 MUX that is comprised of four cascaded 4:1 MUXs. Each MUX has an active-low enable pin. To enable one MUX at a time, I need to use a counter that outputs the following:

Clock Cycle 1: 1110
Clock Cycle 2: 1101
Clock Cycle 3: 1011
Clock Cycle 4: 0111

In decimal, the clock is counting from 14 to 13 to 11 to 7 and then repeating.

2. Relevant equations

I've generated a state diagram, a next-state table, a J-K FF transition table, the appropriate K-maps based on these tables, and finally a set of minimized SOP expressions from the K-maps. However, my output pins (Q0, Q1, Q2, and Q3) are all high all the time. I don't understand why.

3. The attempt at a solution

My tables, K-Maps and SOP expressions are here: http://goo.gl/R0Ij7 [Broken]

Last edited by a moderator: May 6, 2017
2. Oct 8, 2012

### Staff: Mentor

What does the state 1111 transition to? You should check the transition out of all states, to be sure that the maching always returns to the valid main sequence. You should also define a Reset state, and make sure that the machine goes right into the main counting sequence (either from the Reset state, or make the Reset state the first defined state of the sequence)...

3. Oct 11, 2012

Berkeman,

The 1111 state should not be part of the sequence 1110, 1101, 1011, 0111. I am not quite sure how one uses the set pins to sets the J-K flip-flops. Do you need to apply an initial voltage to the set pins for a short period of time and then remove that voltage... or do you leave the set pins connected to the initial voltage that they're set to?

For example, my counter should start at 1110 so I would have high voltage on the first three stages and low voltage on the fourth stage. My book doesn't really talk about how to use the set pins.

4. Oct 11, 2012

I'm going to try using a 555-timer as a one-shot to push a high voltage to three of the stages to create the first state of 1110. I don't know how long those SET pins needing a 1 will need to be held high but I can play around with the pulse width of the one-shot.

5. Oct 11, 2012

### Staff: Mentor

To clarify, you do not need a 4-bit counter for this circuit. You need a 4-state state machine, which has 4 bits of output from each of the 4 states.

How many flipflops does it take to implement a 4-state machine? Which state do you want to be the reset state?

So try doing this with fewer flipflops and add logic at each state to give you the outputs you want. And show the Reset input to the FFs, and drive it with a reset signal to start your sequence...

6. Oct 11, 2012

Ok yes, my terminology is perhaps not very accurate. It is a four-state FSM that I need to create with four outputs per state.

Two flip-flops are required to implement a four-state FSM. But wouldn't I need four FF's to implement a four-state FSM with four outputs per state? I'll try your suggestion on reducing the # of FF's and using combinational logic to get the correct outputs for each state.

How do I drive a reset signal? The software I'm using is MultiSim which doesn't have one-shots. I can use a 555 timer as a one-shot, so I will try that too.

7. Oct 11, 2012

### Staff: Mentor

I'm not familiar with MultiSim, but most SPICE packages would have a waveform generator that you can program to output a pulse. What kind of waveform generators does it have?

8. Oct 11, 2012

Ok, approaching this as a state-machine with two flip-flops, I created the state diagram above.

The input will be a square wave (01010101010101...). Every time there is a 1, the machine progresses to the next state A to B, B to C, D back to A. When there is a zero, the current state is held.

Does this sound closer to the right idea? I will work on a state table and excitation table and see what I come up with.

9. Oct 11, 2012

### Staff: Mentor

Yes, that looks good. To follow convention, you should also show a Reset arrow into whatever you want your first state to be. Real-world state machines always have to have a Reset state defined.

10. Oct 11, 2012

Would the D state count as a reset state since it puts the machine back to the initial state A?

So would this be the convention:

11. Oct 11, 2012

### Staff: Mentor

Your reset arrow looks correct, if you want to start in State A. The D state does not count as a "reset state" -- Your A state is the "reset state", since that's the state you go to when you assert the Reset input on your FFs.

12. Oct 11, 2012

I know that the active-high set pin on a J-K flip-flop causes the output to be high while the active-high reset pin causes the FF to be low. However, I don't know in a production circuit how one would set these pins. I tried a 555 timer connected as a one-shot but that seems like overkill.

Basically, how do I initialize state A (1110) without permanently tying the set and reset pins down?

13. Oct 11, 2012

### Staff: Mentor

In real circuits, you will have at least a power-up reset signal. It may come from a low-voltage indicator (LVI) circuit like an MC34064, or you can make it yourself with an RC delay on the power-up ramp with a pulse-stretching circuit. All sequential logic needs to be reset before it is allowed to run.

And most real-world circuits will have a manual reset signal, which can come from a pushbutton, or from a microcontroller. This can be used to pull the circuit back to a known state if it gets out of synch for some reason.

Are you intending to make a real circuit for this, or are you just wanting to model it? If you search your MultiSim software's help pages, does it offer any advice on how to make a (single) pulse generator? Your simulation should always start with Reset asserted, and then you can release Reset to let your sequential logic circuit run.

14. Oct 11, 2012

Hi again Berkeman.

I was able to use a 555 timer (used as a one-shot) along with a manual enable switch to get the FSM started. I know I have control over the pulse width of the one-shot per the equation tw=1.1R1C1. My current values for R and C have the pulse width pinned at 30 ns. Perhaps reducing the pulsewidth will fix my issue which is that the FSM doesn't stabilize until the fourth clock cycle.

Here is the circuit I have set up:

To answer your other questions, I am doing all of this as a class project in an 8-week (ultra-fast) digital electronics course. So I am doing it with MultiSim parts. However, I want to keep the design as close to "real-world" as possible because I am required to create a parts list in case somebody wanted to really make my design. In other words, I cannot use a pulse generator but must use a production part like the 555 timer connected as a one-shot.

I am enjoying this thoroughly (and hating it simultaneously). Your posts have been very helpful. My project is due next week. I'll keep you updated.

15. Oct 11, 2012

### LCKurtz

Is it part of an assignment that you have to do it that way? You could implement that with a single 4-bit shift register.

16. Oct 11, 2012

Hi LCKurtz (and I apologize for being rude in a previous post),

It is not required in the assignment that I create a FSM like the one I designed. I just read your post and ran over to my wife yelling "a shift register... it makes sense!"

I just opened my book to the portion on shift registers. In particular, a ring counter made with four D flip-flops may work. I would set the first FF to 0 and the other three to 1. During operation the 0 would just move to the next FF in a loop.

0111
1011
1101
1110
(repeat)

I also discovered a 4035 shift register available in MultiSim. I may use it (http://www.komponenten.es.aau.dk/fileadmin/komponenten/Data_Sheet/4000/4035.pdf.pdf).

I'll work on something like that in MultiSim and post my results. Once I get this working, my next goal is to ensure that this 4-bit shift register (ring counter) is timed correctly with another counter (2-bit 00, 01, 10, 11) that I am using for the A/B channel select pins on each MUX.

Last edited: Oct 11, 2012
17. Oct 12, 2012

### LCKurtz

Apology accepted.
Of course, if you are going to use 4 D type flip-flops, you might as well keep your current circuit. I have LogicWorks instead of MultiSim and it has a similar part to your 4035. You should be able to do it with that with no external gates.

18. Oct 13, 2012

Hello again Berkeman and LCKurtz. I completely revamped my whole approach to this problem. Instead of using four MUX's, I'm using two 74157's to multiplex the four 4-bit binary-coded hex digits to the decoder.

I'm using a counter and a decoder to bring the common-cathode pin of one of the LCD displays low at a time. This enables only one display per clock cycle.

From what I can tell, my circuit is working well, except for one thing... The common-cathode displays have an "on current" of 5 mA but my current is in the pico-Amp range. I don't know why considering I'm using a 5 V dc source and 1 k-ohm resistors.

I think the current being way off is causing the crazy flickering in my seven-segment displays. I can see the numbers that should appear on the display, but there is a ton of random flickering which I think is a current issue.

Here is my circuit (minus the decoder which takes up too much space):

The circuit including the decoder (which is just a bunch of combinational logic) is here:

You'll have to hit the magnifying glass button to zoom in.

19. Oct 13, 2012

### LCKurtz

Perhaps I don't understand how your parts work, but it looks to me like if you put the switches in the "right" position, you are shorting the $V_{cc}$ to ground. Or do you have pull-up resistors coming down from the $V_{cc}$ bar you haven't shown?

20. Oct 13, 2012