K-map for a 4-bit synchronous decade counter.

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Discussion Overview

The discussion revolves around the challenges faced in deriving Karnaugh maps (K-maps) for a 4-bit synchronous decade counter as part of a homework assignment. Participants explore the methodology for creating state diagrams, next-state tables, and K-maps for J-K inputs, while addressing specific issues encountered in the mapping process.

Discussion Character

  • Homework-related
  • Technical explanation
  • Debate/contested

Main Points Raised

  • One participant expresses confusion about their method for deriving K-maps for the J-K inputs, specifically for K4/J4 and K2, and questions whether they are marking positions correctly.
  • Another participant identifies that they had mapped three positions incorrectly in K1 and K3 but notes that this did not affect the overall outcome.
  • A third participant agrees with the values derived for the J and K inputs but questions the wiring of the circuit, noting that the J and K inputs for some flip-flops are not equal.
  • A participant acknowledges that they used a circuit found online, which did not match their intended design, leading to discrepancies in their results.
  • There is a mention of multiple design approaches for synchronous decade counters, suggesting that variations exist in circuit implementation.

Areas of Agreement / Disagreement

Participants generally agree on the correctness of the expressions derived from the K-maps, but there is disagreement regarding the circuit implementation and its alignment with the logic derived from the K-maps. The discussion remains unresolved regarding the best method for mapping and circuit design.

Contextual Notes

Participants note potential limitations in their approaches, including incorrect mappings and circuit discrepancies. There is also an acknowledgment of the existence of multiple valid designs for synchronous decade counters, which may affect the interpretation of the K-map results.

muppen
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Homework Statement



I'm a bit at a loss here for a particular assignment we got for one of our labs. I've been using a certain method to derive the k-maps for some circuits, but for this particular one, it didn't really work out too well for some reason. We built and implemented a 4-bit synchronous decade counter. We were then told to make a state diagram, next-state table and a k-map for all the j-k inputs. I'm having a particular issue with the K4/J4 and the K2 maps.

Let me first give you a link to the actual circuit:

http://www.electronics-tutorials.ws/counter/cou14.gif

This is how far I've gotten, I've make a flip-flop transition table, next-state table and also been determining which cells to map with what from it.

http://imageshack.us/f/813/18768245.png/

Is there a flaw in my reasoning? For example, I first take Q1, and check the position 0000 against the next state. I then derive what to place in that position for J1 and K1, and I do the following for all the other positions and Q2-Q4. Am I using the wrong method, or have I mapped something wrong or written something wrong?

Here's how far I've gotten:
http://imageshack.dk//viewimage.php?file=/imagesfree/Fah58500.png

Homework Equations


J1/K1 should always be high, which is correct.
J2/K2 should be Q1Q4'. The J2 is correct, but the K2 is not.
J3/K3 should be Q1Q2, which is correct.
J4/K4 should be Q1Q2Q3 + Q1Q4. I however, get some other results.

Where am I wrong in my reasoning? I know there's another way to solve the K-maps for this counter, by checking previous outputs when the current output toggles, but I've used this method before, and it has worked just fine. Am I marking the positions on the K-map wrong or am I using the wrong method, or does it not apply to these, or what?

I'm grateful for any help.
 
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I noticed the link to the circuit might not work, so here's a working one: http://imageshack.dk//viewimage.php?file=/imagesfree/dr654051.png"

I had mapped 3 positions wrong in the K1 and K3 maps, but it didn't change the outcome at all. Here's the progress so far: http://imageshack.dk//viewimage.php?file=/imagesfree/xD854200.png"
 
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I looked at your work, and I agree with you for the values that you get for your J and K inputs on all four FF's. The ones you marked as possibly wrong are not wrong; they are correct.

What I don't understand is why in your circuit, you have the J and K inputs on each FF connected together. But on FF's 2 and 4 your expressions for J and K are not equal. I think all that is wrong is you haven't wired your circuit to agree with your logic.
 
It's because I just took a circuit from Internet, and implemented that, due to lack of time. It was only afterwards, while doing the report, that I realized it wasn't the same circuit as what circuit diagram showed. The expressions I got from my Karnaugh map were correct, it's just that there's more than one way to design a synchronous decade counter.
 
muppen said:
It's because I just took a circuit from Internet, and implemented that, due to lack of time. It was only afterwards, while doing the report, that I realized it wasn't the same circuit as what circuit diagram showed. The expressions I got from my Karnaugh map were correct, it's just that there's more than one way to design a synchronous decade counter.

I gather that you realize that circuit you lifted from the internet isn't correct. It transitions from hex 6 to hex F : 0110 → 1111.
 

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