Digital Logic - Tri State Buffers

In summary, to implement the function F = A'BC+ABD+AB'D' using 3 tri-state buffers, you need to connect the buffers together and use C, D, and D' as inputs to the buffers. You also need to pass A and B through logic gates to get the input signals. It may be helpful to use a pull up resistor and an inverter to create a "wired AND" gate, but this may not align with the problem's guidelines.
  • #1
GreenPrint
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Homework Statement



I'm trying to implement the function

F = A'BC+ABD+AB'D'

using 3 tri-state buffers. Apparently I'm supposed to connect the buffers together and use C, D, and D' as inputs to buffers. I'm supposed to pass A and B through logic to get the input signals. I'm supposed to additional logic.

Homework Equations





The Attempt at a Solution



Since I'm not given any other restrictions I made the following circuit

http://imageshack.com/a/img703/7883/np43.png

This gives me the correct truth table for the function except for

0000
0001
0010
0011
0100

I get Z, otherwise for all of the other input combinations I get the same outputs as the function. I'm not exactly sure if I'm doing something wrong or need to change somethings around but I'm seem to be stuck.

Thanks for any help.
 
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  • #2
Apparently I'm supposed to connect the buffers together and use C, D, and D' as inputs to buffers.
I think they are needed to set one of the buffers to zero. I'm not sure why you get exactly those 5 states with an undefined output.
 
  • #3
Hi GreenPrint. I'm as new to tri-state buffers as you are, so accept my advice with caution.

First, I think we'd agree that at all times, one and only one buffer must be active and feeding a logic level to the output. I can see you take care of the case where A and B are both HIGH, and where A is LOW and B is HIGH (viz, A'B), and also the third case AB'. But what happens when A is LOW and B also is LOW? You haven't accounted for that occurrence, so when it happens there will be trouble, because no buffer will be feeding any signal to the common output.

So, I'd say you need another tri-state buffer, one that becomes active when none of the of these 3 is active. What logic signal should it deliver to the common output at this time? Certainly not a logic HIGH, that would change the function you are implementing. But feeding a logic LOW won't upset anything.

* EDIT: I'll amend that. No need for a 4th tri-state buffer, you can arrange for one of the three you are using to be enabled for two logic conditions (the one you currently use, plus A'B') and this means you will need fewer logic gates than you show above.

See how you go with that, and report back. There may be something more I haven't considered. *
 
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  • #4
One and only one of the tri-state buffers must be enabled. "Enabled" means the output is active high or low. The other two buffers must be in the third (high-impedance) state.
 
  • #5
Apparently I'm supposed to connect the buffers together and use C, D, and D' as inputs to buffers. I'm supposed to pass A and B through logic to get the input signals.

This isn't at all clear. Is the above part of the problem statement or just one solution to the problem?

What's the difference between "input to buffers" and "input signals" ?

Are you allowed a pull up resistor?
 
  • #6
If you are allowed a pull up resistor then..

If you connect the input of each buffer to it's own enable (active low) then you can build a "wired AND" gate. However I believe you would need an inverter after the buffers.

F = (A'.B.C)+(A.B.D)+(A.B'.D')
= ((A'.B.C)+(A.B.D)+(A.B'.D'))''
= ((A'.B.C)'.(A.B.D)'.(A.B'.D')')'

although this might not be in the spirit of the problem.
 

FAQ: Digital Logic - Tri State Buffers

1. What is a Tri State Buffer?

A Tri State Buffer is a digital logic gate that allows a signal to pass through or be blocked, depending on the state of a control signal. It has three states: high, low, and high impedance. In the high impedance state, the output is effectively disconnected from both the input and the circuit, making it useful for bus systems.

2. How does a Tri State Buffer work?

A Tri State Buffer works by using a control signal to determine whether the output should be high, low, or high impedance. When the control signal is high, the buffer acts as a normal buffer and passes the input signal to the output. When the control signal is low, the buffer outputs a low signal. When the control signal is high impedance, the buffer effectively disconnects the output from the circuit, allowing other signals to pass through without interference.

3. What are the advantages of using Tri State Buffers?

The main advantage of using Tri State Buffers is that they allow multiple signals to share a single communication line, without causing interference. This is useful in situations where there is limited space or resources, such as in microcontrollers and buses. They also help reduce power consumption and can improve circuit performance.

4. What are some common applications of Tri State Buffers?

Tri State Buffers are commonly used in digital circuits for bus systems, where multiple devices need to share a single communication line. They are also used in microcontrollers, memory chips, and other integrated circuits to control the flow of data between different parts of a circuit. They can also be used in electronic switches and multiplexers.

5. Can Tri State Buffers be cascaded or connected in series?

Yes, Tri State Buffers can be cascaded or connected in series to create a larger buffer with more output pins. This is useful when multiple control signals are needed to control a larger number of outputs. However, it is important to properly design the circuit to avoid signal interference and ensure proper control of the outputs.

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