Take a look at the full diode curve, including both the forward bias area and the reverse avalance breakdown area. Both of those areas can result in significant power dissipation, where you have both voltage and current at the same time. That power dissipation causes heating, which in the forward conduction region lowers the forward voltage and increases the forward current. I'm not sure what increased temperature does in the reverse avalance region offhand -- probably helps to limit it since avalanche is related to mean free path. Also in the forward bias region, heating and the positive tempco effects can cause current bunching, which accelerates failure modes.
In my experience, the heating first melts the silicon (in the current bunching areas), which then looks like a low-impedance short. If there is sufficient power from the source, the fail-short will blow open as a fail-open. If there is not sufficient power from the source, it will likely stay a fail-short.
The maximum junction temperature is one key to calculating whether you are at risk for failure. There are also SOA considerations, and the geometry of a power diode construction can help to ease the current bunching issue.