Drawing circuits with NAND gates

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Discussion Overview

The discussion revolves around implementing a circuit using only NAND gates based on a given logical expression. Participants explore the feasibility of their circuit diagrams and the necessity of certain variables in the context of the problem.

Discussion Character

  • Exploratory, Technical explanation, Debate/contested

Main Points Raised

  • One participant proposes a circuit diagram using NAND gates to implement the function $f(w,x,y,z) = x*y + w*x + \bar{y}*\bar{z}$.
  • Another participant points out that the solution is close but emphasizes that the problem requires the exclusive use of NAND gates, noting that NOT gates are not permitted but can be constructed using NAND gates.
  • A participant expresses confusion regarding the inclusion of variables y and z in the circuit, questioning their necessity.
  • Another participant responds to the confusion by comparing the variables x and y, suggesting that understanding the role of each variable is crucial.
  • A later reply indicates that the participant has resolved their confusion regarding the variables.

Areas of Agreement / Disagreement

Participants do not reach a consensus on the necessity of certain variables in the circuit design, and there is some confusion regarding the implementation details. The discussion remains unresolved regarding the optimal circuit design using only NAND gates.

Contextual Notes

There are limitations regarding the assumptions about the variables and the specific requirements of the circuit design that remain unaddressed. The discussion does not clarify the mathematical steps involved in the proposed solutions.

shamieh
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A cheap way to implement this circuit is to use only NAND gates. Draw the circuit diagram for the lowest cost implementation using these gates. (reminder: you can wire a NAND gate such that it acts like an inverter).

$f$(w,x,y,z) = $$x*y + w*x + \bar{y}*\bar{z}$$

My solution:
View attachment 1448 Will this work?
 

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shamieh said:
Will this work?
Close, but the problem statement says you can use only NAND gates, in particular, no NOT gates. However, NOT is easily expressible through NAND.

logic-gates1.png
 
Wow the fact that you got that your drew that diagram on here is awesome lol. But where is the y y and z z coming from? aren't those unnecesarry?
 
shamieh said:
But where is the y y and z z coming from? aren't those unnecesarry?
I don't understand the question, "Where are they coming from?". Do you know where x is coming from? What's the difference between x and y?
 
Nevermind, I see now.
 

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