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1. Homework Statement

The switch is closed. Graph the current in [itex]R_{1}[/itex]

2. Homework Equations

[itex] V = IR [/itex]

[itex] CV = Q [/itex]

3. The Attempt at a Solution

1) [itex]R_{0}[/itex] can be ignored

a) The resistor simply reduces the voltage before any current can be split.

b) We're justified, as a result, in imagining that [itex]R_{0}[/itex] were removed.

2) Through the branch with C and [itex]R_{2}[/itex], current will eventually stop flowing

a) Capacitor C will acquire a potential difference of V

b) When that happens, Kirchoff's loop rule -- that voltage drops and gains belonging to a circuit LOOP sum to zero -- won't need to be fulfilled by having current pass through [itex]R_{2}[/itex]

c) When current doesn't pass through [itex]R_{2}[/itex], the branch can't be completed and current won't flow through it at all

3) If current doesn't enter the capacitor, more of it enters

a) The current entering

b) Eventually, current approaches an asymptote: V/R

4) The resulting graph is logarithmic,

The switch is closed. Graph the current in [itex]R_{1}[/itex]

2. Homework Equations

[itex] V = IR [/itex]

[itex] CV = Q [/itex]

3. The Attempt at a Solution

1) [itex]R_{0}[/itex] can be ignored

a) The resistor simply reduces the voltage before any current can be split.

b) We're justified, as a result, in imagining that [itex]R_{0}[/itex] were removed.

2) Through the branch with C and [itex]R_{2}[/itex], current will eventually stop flowing

a) Capacitor C will acquire a potential difference of V

b) When that happens, Kirchoff's loop rule -- that voltage drops and gains belonging to a circuit LOOP sum to zero -- won't need to be fulfilled by having current pass through [itex]R_{2}[/itex]

c) When current doesn't pass through [itex]R_{2}[/itex], the branch can't be completed and current won't flow through it at all

**d) Is this sound reasoning? Or, is it the case that current does continue flowing through the capacitor but just won't go any further?**

3) If current doesn't enter the capacitor, more of it enters

**[itex]R_{1}[/itex],**our resistor of interesta) The current entering

**[itex]R_{1}[/itex]**will change at the rate that current decreases the capacitor C.b) Eventually, current approaches an asymptote: V/R

4) The resulting graph is logarithmic,

*except that it has an asymptote at y = [itex]V/R[/itex]*

Note! Do not rely on this graph. Just frames the idea.Note! Do not rely on this graph. Just frames the idea.

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