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Hazard-free AND-OR circuits proof

  1. Sep 17, 2006 #1
    I've been at this for a while now and I'm getting nowhere. The problem is to prove that a two level AND-OR (sum of products) circuit corresponding to the complete sum of a logic function is always hazard free (static hazard). I can't even figure out where to begin with this, any help would be appreciated :smile:
     
  2. jcsd
  3. Sep 22, 2006 #2

    berkeman

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    Staff: Mentor

    What is meant by hazard free? I'm not familiar with that term in the context of logic design. Are you talking about metastability in flip-flop and latching circuits?
     
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