How Do Divide-by-N Counters Work in Binary and Decimal Systems?

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Discussion Overview

The discussion centers around the functioning of divide-by-N counters in both binary and decimal systems, specifically addressing how to implement a divide-by-9 counter and a base-10 counter using a 4-bit input configuration. The scope includes theoretical understanding and practical application in circuit design.

Discussion Character

  • Homework-related
  • Technical explanation
  • Exploratory

Main Points Raised

  • One participant questions why the 2's complement of 9 (0111) is used instead of the binary representation of 9 (1001) for a divide-by-9 counter, suggesting it relates to the counter counting to 16 minus the input.
  • Another participant explains that when the counter reaches 15 and receives an additional clock pulse, it generates a carry-out signal that triggers a load operation, allowing the counter to start from a specified input rather than resetting to zero.
  • There is a proposal that to create a base-10 counter, one could detect the transition from 9 to 10 and reload the counter to zero, although this would require additional components.
  • Some participants assert that the counter cannot function as a 0 to 9 counter because it must always cycle through 15.

Areas of Agreement / Disagreement

Participants express differing views on the feasibility of using the counter for a 0 to 9 range, with some asserting it is not possible while others suggest modifications could allow for a base-10 counting mechanism. The discussion remains unresolved regarding the specific implementation details for a base-10 counter.

Contextual Notes

There are assumptions regarding the operation of the counter that may not be fully articulated, such as the specific requirements for loading values and the implications of using 2's complement. The discussion also does not clarify the limitations of the circuit design in terms of component requirements for the proposed modifications.

Who May Find This Useful

Students and practitioners interested in digital circuit design, particularly those exploring counter mechanisms and their applications in different numerical bases.

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Homework Statement



rwuc2d.jpg


Fig (a) is a counter, fig (b) is a divide-by-N counter (0 < N < 16).

The 4-bit input ABCD is (I think) what the counter counts to before resetting.

Questions

#1: For circuit (b): Say you want a divide-by-9. Why is it that to do this, the 2's complement of 9 (0111) is loaded into inputs ABCD, rather than 9 in binary (1001)?

#2: Using this same circuit, how could I make a counter that counts in base 10 rather than 16?

The Attempt at a Solution



First question: I think this is because the counter counts to 16 minus the input in binary. So, since the 2's complement of 9 is 16-9, it will count to 16-(16-9) = 9. If this is correct, why does the counter count to 16 minus the input?

Second question: Not sure at all. Any hints?

Thanks for any help.
 
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When the counter output is 15 and it gets one more clock pulse, it generates a high output on the carry out.

This is inverted to give a low on the load input.

So, instead of going to zero, the counter loads whatever is on the data inputs... and on the next clock pulse, counts upwards from there until it gets to 15 again.

So, if it loads 4, it will then go 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 4, ...
It took 12 pulses to do this. 16 minus 4 is 12. So, to divide by 12 we load 16 minus 12.

No, you can't use it as a 0 to 9 counter because it always has to go through 15.
 
Thanks, that makes sense. What about the last question: how could a "base 10" counter be designed using this circuit, as opposed to what we have, a base 16 counter?
 
No, you can't use it as a 0 to 9 counter because it always has to go through 15.
 
If you post something then delete it, I still get an email of it.

Yes, you could detect the 9 to 10 change and reload 0 instead. This would require a few extra components.
 

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