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How does the Over Flow flag work in 8051 MCU ?

  1. Feb 26, 2014 #1
    If i have a condition like : Adding
    (1100 10002)[20010] + (0011 11002)[6010] = (1 0000 0100)26010

    that is how i do the normal arimethic.

    But how does the 8051 does it? is it because it the carry 1 is ignored, then the output answer still withing 127 to -128 range the Over Flow Flag(OV) in Program Status Word(PSW) remain 0, error is not detected by the OV.

    But when i use another example like:
    1100 1010 + 1100 1010 = 1) 1001 0100;
    ignoring the carry, the result is out of the 127 to -128 range so the OV will get set to report Over Flow error?


    Or this statement is more accurate to describe Ov:
    the Overflow (OV) bit is set if there is a carry-out of bit 6 or out of bit 7

    So does the following statements below determine the behavior of OV:
    1. if it is Addition operation(ADD and INC instruction), if the answer is withing 127 to 0, OV = 0, else = 1
    2. If it is subtraction operation(SUBB and DEC instruction), if the answer is from 0 to -128. OV = 0 else = 1

    Or OV work in this way:
    number with '1' at the 8th bit is consider as negative number else consider as positive;

    When Adding 2 positive number the resultant number has '1' as 8th bit, being consider as negative number then OV = 1

    When Adding 2 negaitve number the resultant number has '0' at 8th bit, OV = 1

    If so what would happen if adding 1 negative number with 1 positive number ?


    Or it is the Overflow (OV) bit is set if there is a carry-out of bit 6 or out of bit 7
     
    Last edited: Feb 26, 2014
  2. jcsd
  3. Feb 26, 2014 #2

    meBigGuy

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