How to bias a transistor into cutoff

[zak8000]

hi
i would like to bias a transistor into cutoff. i have the schematic shown below and for the transistor i am using it has a collector cutoff current at 100nA. so my approach was frist to perform Dc analysis:

Vth=5*(R10/(R10+R4)) Rth=(R4*R10)/(R10+R4)

so my input equation is:
Vth=Rth*Ib+0.9+Ie*R12
and output equation is:
5=Vce+Ie*R12

i would ussually say Ie=Ib+Ic=(B+1)Ib but i don't think this equation holds at cutoff so should i assume Ic>100nA like 105nA so the amplifier will be in the active region(so i can use Ic=B*Ib) and then increase resistance values so Ic<100nA and the transistor will be in cutoff please help!

 

[berkeman]

hi
i would like to bias a transistor into cutoff. i have the schematic shown below and for the transistor i am using it has a collector cutoff current at 100nA. so my approach was frist to perform Dc analysis:

Vth=5*(R10/(R10+R4)) Rth=(R4*R10)/(R10+R4)

so my input equation is:
Vth=Rth*Ib+0.9+Ie*R12
and output equation is:
5=Vce+Ie*R12

i would ussually say Ie=Ib+Ic=(B+1)Ib but i don't think this equation holds at cutoff so should i assume Ic>100nA like 105nA so the amplifier will be in the active region(so i can use Ic=B*Ib) and then increase resistance values so Ic<100nA and the transistor will be in cutoff please help!

Looks like the schematic did not post. Can you try again? What is the application for the circuit?

 

[zak8000]

ops i taught i attached it. anway i figured it out, it is used for RF applications