# How To Implement This Function With 2 Input Nand without

1. Jan 24, 2010

### Zayer

How To Implement This Functions With 2 Input NAND without using any gates as inverter ??

A=WX’Y’+W’X+W’Y
B=WX’Y’+WX’Z’
C=W’X+WX’Y’
E=Y’Z+W’Z+WX’Y
F=WX’+W’XY+WY’Z
D=WX’+W’XY+WY’Z
G=W’X+WX’Y’+WY’Z
H=WX’Z’+WY’Z
J=WY’+W’X+W’Y

see the attachment , the question in part e

there are more than three functions that need 3 Input NAND and some minterms with 3 literals. We have only one 7410 package with 3 Input and plenty of 7400 package

#### Attached Files:

• ###### Project.pdf
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2. Jan 24, 2010

### story645

Read your PDF, it gives the solution for the NOT gate problem really early on.

Pull out all those old logic simplification rules to good use, and try a karnough map and the like. Just looking briefly at your list, I see one problem where you use the distributive rule to factor out a term so the entire thing can be implemented with two input NANDs. Most of your other problems also simplify as such.

Last edited: Jan 24, 2010
3. Jan 24, 2010

### Zayer

Thanks
I obtained another set of equations

A’=WY+WX+W’X’Y’
B’=W’+X+YZ
C’=WX+WY+W’X’
D’=F’=W’Y’+W’X’+WXZ’+WXY
E’=Y’Z’+XZ’+W’Z’+WXY
G’=WY+W’X’+WXZ’
H’=W’+YZ+XZ’
J’=WY+W’X’Y’

W'X'Y WXY WXZ'

are the only prime implicants that needs 3 Input NAND(if we didn't use inverter)

I think it's impossible to implement WXY with only 2 Input NAND gates without using inverters

4. Jan 24, 2010

### story645

That's what slipped my mind anyway. You've gotta use de Morgan's law to put everything in AND form anyway, which will probably end up giving you the NAND constructs when you simplify.

De Morgan's Law:
'A + 'B = '(AB)
'(A+B) = ('A'B)

Last edited: Jan 24, 2010