How To Implement This Function With 2 Input Nand without

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Discussion Overview

The discussion focuses on implementing specific logical functions using only 2-input NAND gates without utilizing any inverters. Participants explore various equations and simplification techniques relevant to digital logic design, particularly in the context of limited gate availability.

Discussion Character

  • Technical explanation
  • Debate/contested
  • Mathematical reasoning

Main Points Raised

  • One participant presents a set of logical functions that need to be implemented using 2-input NAND gates, specifying the functions A, B, C, D, E, F, G, H, and J.
  • Another participant suggests referring to a PDF for solutions regarding the NOT gate problem and mentions using logic simplification rules and Karnaugh maps to aid in the implementation.
  • A third participant shares a new set of equations derived from the original functions, indicating that certain prime implicants require 3-input NAND gates if inverters are not used, and expresses doubt about implementing WXY with only 2-input NAND gates.
  • One participant highlights the necessity of applying De Morgan's law to convert expressions into AND form, which may lead to the required NAND constructs during simplification.

Areas of Agreement / Disagreement

Participants express differing views on the feasibility of implementing certain functions with only 2-input NAND gates without inverters. While some propose simplification strategies, others question the possibility of achieving specific implementations.

Contextual Notes

Participants reference the limitations of available gate types and the need for simplification techniques, indicating that certain assumptions about the functions and their representations may affect the discussion.

Zayer
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How To Implement This Functions With 2 Input NAND without using any gates as inverter ??

A=WX’Y’+W’X+W’Y
B=WX’Y’+WX’Z’
C=W’X+WX’Y’
E=Y’Z+W’Z+WX’Y
F=WX’+W’XY+WY’Z
D=WX’+W’XY+WY’Z
G=W’X+WX’Y’+WY’Z
H=WX’Z’+WY’Z
J=WY’+W’X+W’Y

see the attachment , the question in part e

there are more than three functions that need 3 Input NAND and some minterms with 3 literals. We have only one 7410 package with 3 Input and plenty of 7400 package
 

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Zayer said:
How To Implement This Functions With 2 Input NAND without using any gates as inverter ??
Read your PDF, it gives the solution for the NOT gate problem really early on.

there are more than three functions that need 3 Input NAND and some minterms with 3 literals. We have only one 7410 package with 3 Input and plenty of 7400 package
Pull out all those old logic simplification rules to good use, and try a karnough map and the like. Just looking briefly at your list, I see one problem where you use the distributive rule to factor out a term so the entire thing can be implemented with two input NANDs. Most of your other problems also simplify as such.
 
Last edited:
Thanks
I obtained another set of equations

A’=WY+WX+W’X’Y’
B’=W’+X+YZ
C’=WX+WY+W’X’
D’=F’=W’Y’+W’X’+WXZ’+WXY
E’=Y’Z’+XZ’+W’Z’+WXY
G’=WY+W’X’+WXZ’
H’=W’+YZ+XZ’
J’=WY+W’X’Y’

W'X'Y WXY WXZ'

are the only prime implicants that needs 3 Input NAND(if we didn't use inverter)

I think it's impossible to implement WXY with only 2 Input NAND gates without using inverters
 
Zayer said:
WXY with only 2 Input NAND gates without using inverters
That's what slipped my mind anyway. You've got to use de Morgan's law to put everything in AND form anyway, which will probably end up giving you the NAND constructs when you simplify.

De Morgan's Law:
'A + 'B = '(AB)
'(A+B) = ('A'B)
 
Last edited:

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