Is a K-map Sufficient for State Minimization in Digital Circuits?

[jazzel70]

The problem is attached as a picture.

Should I just do a K-map for the output?

All I did was a K-map for the output but I don't think it works

 

[berkeman]

The problem is attached as a picture.

Should I just do a K-map for the output?

All I did was a K-map for the output but I don't think it works

I would draw the state diagram first to see if the outputs map directly to states (or if more logic is needed), then use a K-Map to help with minimization.

How many states are in the table? How many bits will it take to encode those states? Are there any unused states left over? If so, you will need to handle that...

 

[jazzel70]

do you consider the present states when doing the state diagram?

 

[berkeman]

do you consider the present states when doing the state diagram?

Yes, you transition between the present state and the next state according to the table, based on the input value.

 

[jazzel70]

this is what i have done so far

 

[jazzel70]

is there another way of minimising the number of states?

 

[berkeman]

is there another way of minimising the number of states?

The number of states is given in the problem statement. Well, you would also normally add the extra states into the diagram for the unused states (the problem calls for 6 states, which leaves 2 unused states). You cannot allow unused states in a real state machine, because that could cause the machine to stall forever if it ever gets into one of those states. You generally have the unused states have transitions back into the other states (preferably the Reset state).

But in this simpler problem, they don't seem concerned about the unused states. Do you have an initial implementation of the state diagram?