JFET, Mosfet, BJT Design Question

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Discussion Overview

The discussion revolves around designing a 3-channel JFET amplifier using the 2N5459 transistor, focusing on the theoretical and practical aspects of amplifier design, including biasing, gain calculations, and component selection. Participants share their experiences, calculations, and uncertainties encountered during the design process.

Discussion Character

  • Exploratory
  • Technical explanation
  • Homework-related
  • Debate/contested

Main Points Raised

  • One participant expresses confusion about the design process for a JFET amplifier, noting the need for guidance on how to approach the problem and the relationships between various parameters like R1/R2 and their effects on input/output impedance.
  • Another participant suggests starting with the input section and compares it to an OpAmp input section, indicating a potential direction for the design.
  • There are discussions about the importance of clarity in communication, particularly regarding the use of abbreviations and symbols in technical discussions.
  • A participant shares their output measurements and questions the discrepancy between their calculated and measured values, particularly regarding gain and the effects of biasing.
  • Concerns are raised about the role of capacitors in the circuit, specifically regarding their placement across the source resistor (Rs) and their impact on AC and DC signals.
  • Participants discuss the implications of feedback in amplifier circuits and the importance of understanding the differences between various amplifier configurations.
  • One participant inquires about the calculation of decoupling capacitors and the time constant in relation to resistor values in a common source circuit.
  • Another participant introduces the concept of Zero Value Time Constants as a technique for addressing bandwidth and stability requirements in circuit design.

Areas of Agreement / Disagreement

Participants express various viewpoints and uncertainties regarding the design process, component selection, and the effects of different configurations. There is no clear consensus on the best approach or solutions to the problems raised.

Contextual Notes

Participants mention specific values and measurements, but there are unresolved questions about the relationships between components, the influence of feedback, and the selection of capacitors for decoupling. The discussion reflects a range of assumptions and conditions that are not fully clarified.

Who May Find This Useful

Students and practitioners in electronics and amplifier design, particularly those working with JFETs, BJTs, and MOSFETs, may find the insights and questions raised in this discussion relevant to their own design challenges.

Weightofananvil
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Hi,
In my electronics class we are learning BJT, Mosfet, JFET theory. My gripe at the moment is that when teaching this you are taught how to troubleshoot and solve for circuits already made. This means you are always solving for various voltages, currents, Gm etc etc. With no previous explanation of how We did a lab today where I had 2 design a 3 channel Jfet amplifier using a 2n5459.

I sort of have an idea but I am mostly lost.
This is school work, so don't give me answers just nudge me in the direction.

I know from the data sheet:

VP is -2 to -8V
Idss is 4 Ma - 16 Ma
Gfs - 200 umhos - 600 umhos

I tested my jfet and found my Idss to be 13.46 mA using a test circuit
I also found Vp to be -4.8V
I plotted and graphed a detailed Vgs Vs ID plot.

Other info needed for design of circuit:

- Av 3-4
- Input signal 200mBpk
- Power supply 9V (Can be 12V if needed due to high Idss)Things I think are correct

- I know that if I make this a voltage divider circuit R1/R2 ratio will have to give me my desired Vp. I also know from seeing circuits these resistances are usually around the 1M ohm area.

- I know that Vds is a value I must choose to try and solve for.

- I I feel like Rs doesn't really change Vout a lot but I could be wrong. It would however at to total current flow from Drain to Source.

- I know that Vds must be in the active region, not the ohmic region.
Problems

- I don't know which thing to solve first. I have no intuition of where to start because I am not really 100% sure how R1/R2 (Zin) affect Zout or any sense of order because I've never had to think of it this way.

- I've tried analyzing it as DC, as the small signal model used for AC analysis, and as the graphed parameters.

- Can anyone explain or help me get started? The only thing I have figured out is that I can solve GM. I'm not sure which variables are things I choose, how to pick a number for R1/R2 or how to even manage to find values with Av needed.

Thanks in advance.
 
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Start with the input section. You know what an OpAmp input section should look like?
 
Svein said:
Start with the input section. You know what an OpAmp input section should look like?

No :-(
We've done diodes, BJT's, Jfets and I've gone ahead a bit and looked at mosfets because they are similar.
 
Start by reading http://socrates.berkeley.edu/~phylabs/bsc/PDFFiles/bsc5.pdf .
 
Last edited by a moderator:
Weightofananvil said:
Can anyone explain or help me get started? The only thing I have figured out is that I can solve GM. I'm not sure which variables are things I choose, how to pick a number for R1/R2 or how to even manage to find values with Av needed.
Thanks in advance.
As an example - in this last sentence you have used three abbreviations (symbols: GM, R1/R2, Av). In some cases, the reader can guess what the symbols mean.
However, if you wait for a really helpful answer you must try - from the beginning - to make your question clear in order to avoid misunderstandings. It is good and helpful practice that in each technical text the meaning of all symbols is explained. Such an explanation could (and should) be supported by a circuit diagram or any other relevant graph.
 
Hey,
Sorry for not being clear,
For example I'm trying to just make a JFet amp circuit. Its biased in the middle just so I can make sure it works.

Attached is my calculations.

Output measured is
Vd = 7.44V
Vs = 4.73V
Vg = 2.238V

For Ac:

Originally I wanted to use 200mVp but My function generator doesn't go that low so I used 350 mVp @ 1 kHz
Input = 0.355 Vp
Output = 0.705 Vp
Av = 1.98Things I'm unsure about:

- In my calculations I went for an AV of 3 but ended up with 2. Is that just that the gate isn't creating the depletion region as expected?
I previously had done some work to find Idss and Vp of the same transistor I used.

-If I wanted to hook up a tiny 8 ohm speaker to the output to hear my 1k signal would anything else be required aside from a decoupling cap?

- I was told its good practice to put a parallel capacitor to Rs however I don't really understand what it does. I get that it blocks the DC and let's AC go to ground bypassing Rs but I don't understand the influence that has on Vout.

-Vd calculated was 6 measured was 7.44V is that acceptable?

-My next project is to build a VU meter using op amps as comparitors. If I were to attach that after to a jfet/mosfet/bjt amp where in theory would you attach that? (I don't necessarily have to, I'm just curious)
Thanks in advance
 

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Put a capacitor across Rs. Any value above 1uF. Get the polarity right if you use an electrolytic ('+' to the FET Source, '-' to Ground). And we can continue from there.

Looking at the datasheet, Vd of 7.4V is reasonable due to the wide tolerance of the transistor characteristics.
 
Thanks for the reply. I put a 10uf cap there. I just don't understand what it does.
 
Did the AC gain change any? If so, what is gain with the cap in there?
 
  • #10
Did the professor cover amplifier configurations? Take a look at the difference between the common source and common source with degeneration, and compare your circuit while looking at the small signal model compared to the operating point or (DC) biasing. What happens to large capacitors in each of these models? Recall that \tilde Z_C = {{1} \over {j \omega C}}
 
  • #11
Weightofananvil said:
Thanks for the reply. I put a 10uf cap there. I just don't understand what it does.
Have you ever heard about feedback and its consequences?
Depending on the feedback network (in the prent case, a simple Re||Ce combination) we must discriminate between DC and AC (signal) feedback.
 
  • #12
Thanks for all your replies guys/gals.
Appreciate it.

LvW + JP - I do know the consequences. I'm still unsure in a BJT, Mosjet, Jfet circuit how I would calculate what capacitor to use
as a decoupling capacitor.

I know RC makes up the time constant but which resistor values in say a CS circuit do I use to calculate the time constant?
 
  • #13
Does your circuit have bandwidth or stability requirement? There's a technique called the Zero Value Time Constants that might be helpful for you. I used an online search on this technique and found seemingly good slides from a university on this technique [UNM's, UCB's]. It's an approximation strategy, but if you want definitive answers that take a while, then I would put a hypothetical/test capacitor between the stages, derive the transfer function, and look at the bode and Nyquists plots.

Am I answering your question or does this make sense?
 
  • #14
Jprz said:
Does your circuit have bandwidth or stability requirement? There's a technique called the Zero Value Time Constants that might be helpful for you. I used an online search on this technique and found seemingly good slides from a university on this technique [UNM's, UCB's]. It's an approximation strategy, but if you want definitive answers that take a while, then I would put a hypothetical/test capacitor between the stages, derive the transfer function, and look at the bode and Nyquists plots.

Am I answering your question or does this make sense?

Just audio frequency range, so 20hz-20khz.
 

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