Latches and flip flops - how is stable state defined?

  • Thread starter Thread starter Same-same
  • Start date Start date
  • Tags Tags
    Stable State
Click For Summary
SUMMARY

The discussion clarifies the definition of "stable state" in the context of latches and flip-flops, emphasizing that a stable state is one that persists even when inputs revert to neutral levels. It distinguishes between stable configurations and stable memory states, noting that a stable memory state is maintained without continuous input. The conversation also highlights the role of stability in electronic circuits, particularly in bistable circuits and Schmitt triggers, which utilize non-linearity and hysteresis to achieve stability.

PREREQUISITES
  • Understanding of S-R latches and flip-flops
  • Familiarity with bistable circuits
  • Knowledge of hysteresis in electronic circuits
  • Basic concepts of input-output characteristics in digital electronics
NEXT STEPS
  • Research the operation of S-R latches using NOR and NAND gates
  • Learn about the characteristics and applications of bistable circuits
  • Study the function and design of Schmitt triggers in noise reduction
  • Explore the concept of stability in electronic systems and its implications
USEFUL FOR

Electronics students, circuit designers, and engineers interested in digital logic design and stability analysis in electronic circuits.

Same-same
Messages
27
Reaction score
0
Latches and flip flops - how is "stable state" defined?

My textbook and professor both make numerous references to "stable state" of a latch of flip-flop, but never actually define it.
It's not intuitive. For instance, if the present output Q is 0, and we input S=1 and R =0, the circuit's next state, Q+ , is 1, and this is a stable configuration, but the textbook says this is not a stable state.
So what does "stable state" actually mean in this context?
 
Engineering news on Phys.org
I'm not aware of how the application of a steady state 1-0 or 0-1 input to an S-R latch (using nor2 or nand2 gates) can result in an unstable state except during the period of transition. But I expect the textbook is correct and I am missing some information. Perhaps it is referring to the transient state during which the output is 1-1 (nand) or 0-0 (nor) due to propagation delays.
 
Same-same said:
My textbook and professor both make numerous references to "stable state" of a latch of flip-flop, but never actually define it.
It's not intuitive. For instance, if the present output Q is 0, and we input S=1 and R =0, the circuit's next state, Q+ , is 1, and this is a stable configuration, but the textbook says this is not a stable state.
So what does "stable state" actually mean in this context?
I'd need you to sketch the gate arrangement to be sure, but I think you will find that a state which exists only while it is forced by the continued presence of a peculiar input is considered not a stable state. A stable memory state is one that will be maintained even when the inputs revert to their inactive/neutral level (the STORAGE state).

I can't comment on any distinction re a "stable configuration" vs "stable state"
 
The word 'stability' can refer to several different things. This can lead to confusion.
Stability, in this context usually refers to a situation in which, when a small perturbation is introduced, a system will return to its original state. In electronics, you can get stability with positive feedback (as with a simple 'bistable' circuit - Google gives dozens of hits). Stability in this sense requires some non-linearity. Once the bistable circuit is in one state (i.e. the output is hi or lo) then the input signal needs to cross a certain threshold value for the state to change - then the output state will swing to the other stable state. So the input output characteristic will be a 'step'.
A Schmitt trigger is another circuit which has 'hysteresis' which is a decision making circuit that cuts out the effect of low level noise on a signal. Once the input reaches a certain level, the Schmitt 'decides' it's high enough in level so it 'flips', the input signal then needs to go to a significantly low level before it decides to flip back.
 

Similar threads

  • · Replies 5 ·
Replies
5
Views
1K
  • · Replies 1 ·
Replies
1
Views
2K
  • · Replies 3 ·
Replies
3
Views
2K
  • · Replies 1 ·
Replies
1
Views
3K
Replies
20
Views
4K
  • · Replies 6 ·
Replies
6
Views
4K
Replies
6
Views
5K
  • · Replies 5 ·
Replies
5
Views
5K
  • · Replies 28 ·
Replies
28
Views
4K
  • · Replies 3 ·
Replies
3
Views
13K