Minimization of a Multi Output Circuit

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To minimize the number of gates in a multi-output circuit with 4 inputs and 7 outputs, one should analyze the commonalities in the terms derived from Karnaugh maps for each output. Exploring shared logic between outputs can help reduce gate usage. The type of gates available, such as whether only 2-input gates are permitted or if wider fan-in gates can be utilized, also impacts the minimization strategy. Techniques like consensus theorem and common sub-expression extraction may be beneficial. Identifying overlaps in the outputs' logic expressions is crucial for achieving an efficient design.
carlodelmundo
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Hi all.

I have a 4 input circuit (ABCD). I have 7 outputs that accompany this circuit. Now, I have tools (like Karnaugh maps) to solve for Standard Sum of Products (or Product of Sum) form for individual outputs. I have the minimum of each output based on the Karnaugh map.

However, I want to minimize the amount of gates to use for ALL 7 outputs (ie: if 2 or more outputs can share a gate).

How can I accomplish this? What techniques can I use to find the minimum?
 
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carlodelmundo said:
Hi all.

I have a 4 input circuit (ABCD). I have 7 outputs that accompany this circuit. Now, I have tools (like Karnaugh maps) to solve for Standard Sum of Products (or Product of Sum) form for individual outputs. I have the minimum of each output based on the Karnaugh map.

However, I want to minimize the amount of gates to use for ALL 7 outputs (ie: if 2 or more outputs can share a gate).

How can I accomplish this? What techniques can I use to find the minimum?

Interesting question. I don't know of a general technique (but there certainly could be one). When you compare the terms for each output, do you see any commonalities? Are you limited to 2-input gates, or can you use wider fan-in gates?
 
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