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Need help understanding output (Common Drain)

  1. Dec 14, 2009 #1
    So I have this VCO for which I'm trying to calculate the characteristic equation for, vo/vi. Image of this and the small circuit equivalent attached.

    I've also attached a simpler (in my opinion) common-source small signal equivalent to express that representation of the output, for instance, is rather intuitive in this case. We see an equivalent impedance (parallel resistors) with a current through them (negative polarity relative to Vo).

    In other words, I can't intuitively understand what is going on in the common-drain case. We have an equivalent impedance at the output (R parallel with C2), but there is a transversal component, C1, which is throwing me off badly. I suppose I'm looking for key words or hints that may give me a little more insight into this calculation.

    Some specific questions:
    -Is our input here (Vi) Vg or Vgs?
    -The output (Vo) I would call Vs, or similarly Vsd since the drain is (dynamically) grounded.

    Attached Files:

  2. jcsd
  3. Dec 15, 2009 #2


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    To understand this oscillator, you need to look at the tuned circuit on its own.

    Consider a signal source feeding the tuned circuit as in the following diagram:

    ST Colpitts.PNG

    This produces a peak in output at about 3.5 MHz as shown. I verified this by building it.

    Now if this output was connected to the gate of a suitably biased source follower, the FETwould feed almost the same input to its output at some power gain. This would then act as the input to this circuit.

    As there is a voltage gain here in the tuned circuit, and some rapid phase shifts, the input to the FET would keep rising and produce oscillation when the gate voltage is in phase with the source voltage.
  4. Dec 15, 2009 #3
    First thing I noticed was your input/output in reversed order to how I was looking at it, but that's what you're referring to when you say "this would then act as the input", right?

    If I'm going to do it the textbook way, in which I find the loopgain as the product of the open-loop gain * beta-network gain, the b-network is everything external to the FET, correct? Including the resistor, I mean.
  5. Dec 15, 2009 #4


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    I'm not sure you could model this like a normal amplifier.

    The FET has a simple role in the operation of the circuit, although there has to be power gain, of course, for the oscillation to happen.

    The output of a FET as a source follower is in phase with the gate voltage and about 90% of the gate voltage in amplitude.
    It is also at a much lower impedance than the gate, and it needs to be in this circuit because the tuned circuit looks like a series tuned circuit from the source viewpoint. So, it is low impedance at resonance.

    Anyway, the driving power for the tuned circuit comes from the source of the FET. The tuned circuit produces a stepup in voltage that more than compensates for the 0.9 fractional gain of the FET. So, oscillation is possible, provided the gate signal can be in phase with the source voltage.

    A practical version of this circuit has to include a diode from gate to ground. This generates a negative voltage which drives the FET toward cutoff and limits the amplitude of the oscillation. This gives a cleaner sinewave out.
  6. Dec 16, 2009 #5
    If from the tuned circuit you're excluding the capacitor in parallel with the resistor, then I can see how the rest is in series, yes.

    I say this because of what happens at the junction of both capacitors:


    ...or a variable capacitor in series with the inductor?

    Thank you for the words, really provided some insight.
    Last edited: Dec 16, 2009
  7. Dec 18, 2009 #6
    More clearly, what is the tuned circuit in this case?

    I have an oscillating frequency condition which must be satisfied for the whole characteristic equation, which is a function of the inductor and all three capacitors.

    What's not clear to me is if the other "tuned" circuit, the branch with inductor L and variable capacitor C3, must satisfy its own resonant frequency condition as well? Should it be treated separately as well as in conjunction?
  8. Dec 18, 2009 #7


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    The coil resonates with whatever capacitance is across it. In this case, that is the 3 capacitors in series.

    This is not affected by how you drive it or by where you take output from it, as long as you don't add extra reactance to the circuit.

    It is tempting to classify these circuits as series resonant or parallel resonant, but the difference is only in where you look at it.

    Driving an LC cct.PNG

    In the above circuit, you would say the tuned circuit is series resonant. But it is very dependent on the output impedance of the signal generator. If this is 600 ohms, you may not even see a resonance dip.
    Putting a capacitor across the signal generator allows the tuned circuit to resonate properly. So the circuit only resonates properly if it has a complete circuit of capacitors across it.
  9. Dec 19, 2009 #8
    This concept isn't immediately clear to me. I have textbooks and the internets at my disposal, what topic would you recommend I review to help me understand this?
  10. Dec 19, 2009 #9


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    I will have a look for some references. Look for pi networks.

    Just to show the effect of using tuned circuits like this, I did a simulation that shows the substantial voltage stepup you can obtain:

    pi network.PNG

    The capacitor values are in pF. The signal generator at left is generating sinewaves with 2 volts amplitude.

    pi net graph.PNG

    This is the result. The purple line is the voltage across C1. The black line is the voltage across C2.
  11. Dec 21, 2009 #10
    Wow, that's pretty cool. Good idea, I should probably explore some of these simpler circuits in the simulator.

    So am I correct in thinking this C1 in your diagram is equivalent to the C1 + C2 series capacitances in my circuit? Thanks a bunch for your input.
  12. Dec 21, 2009 #11


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    I find simulators very addictive and it is tempting just try one more thing.

    I put in this circuit:
    Clapp cct.PNG
    into the simulator

    And got this output:
    Clapp plot.PNG

    I have shown a logarithmic plot to show the sharp series resonances at the left.
    The main output is at about 27.5 MHz.
    Blue is across C1. Black is between C3 and L1. This would be the gate of your FET.
    Purple is across C2

    C2 has to be smaller than C1 and C3 to get a voltage stepup at the gate.

    Lowering the impedance of the signal generator to 1 ohm (which would be more like the source follower output in your oscillator) gives a classic series resonance:
    Clapp plot 2.PNG
    Note that output of nearly 300 volts across C2 for a 2 volt input. C1 is effectively shorted out. The green plot would be your gate voltage.
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