Engineering Optimizing Full Adder Circuit: Truth Table & Gate Count Reduction Tips

[The Jargon]

Heres my truth table

A|B|Cin|Sum|Cout
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1

Here's my two equations from the K-maps

Sum = A+B+CIn
Cout = A.B+CIn(A+B)

Now what I want to ask is, is there a way the gate count be reduced further by sharing terms between the two output functions?

Thanks.

 

[The Jargon]

Nvm figured it out.