OR Gate Voltage Drop: A=5V, B=4.6V

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Discussion Overview

The discussion revolves around the behavior of a diode OR gate with specific input voltages, focusing on the output voltage when one input is at 5V and the other at 4.6V. Participants explore the implications of these voltages on the diode characteristics and output behavior, engaging in both conceptual and technical reasoning.

Discussion Character

  • Technical explanation
  • Conceptual clarification
  • Exploratory

Main Points Raised

  • One participant questions whether the output voltage remains at 4.4V given the input voltages and suggests that the D2 diode is forward biased with a smaller voltage drop than D1.
  • Another participant asserts that the A input alone is sufficient to maintain the output voltage, recommending familiarity with the V-I plot for diodes to understand their behavior better.
  • A participant notes that the voltage drop across D2 will be small due to the A input and inquires about the mechanism that allows the A input to determine the output voltage instead of the expected value based on the B input.
  • One response suggests using Kirchhoff's Current Law (KCL) and the diode equation to analyze the circuit, proposing a method to calculate currents and voltages based on assumed parameters.
  • A participant expresses gratitude for the responses and acknowledges the need for further study on diodes.

Areas of Agreement / Disagreement

Participants do not reach a consensus on the exact output voltage or the dynamics of the diodes in this scenario, indicating that multiple views and uncertainties remain regarding the behavior of the circuit.

Contextual Notes

Participants mention assumptions related to diode behavior, such as the forward voltage drop and saturation current, but do not resolve the implications of these assumptions on the output voltage.

dobry_den
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Hi! I've got another diode OR gate problem. When the voltage at the input A is 5V and it's 4.6V at the input B, does the output voltage still remain at 4.4V? Does it mean that the D2 diode is forward biased and its voltage drop* is smaller than the voltage drop of the D1 diode?

*the constant-voltage-drop is about 0.6V, thus the voltage drop across the D2 diode should be just about 0.2V

The attached image is a scheme of the OR Gate when A is 5V and B is 0V
 

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Yeah, just the A input is enough to hold up the output. Just get familiar with the V-I plot for diodes, and their behavior will be a lot more intuitive.
 
Ok. So due to the 5V A input, the voltage-drop across the diode 2 will be quite small (just about 0.2). It's apparent from the V-I plot that the current going through this diode will be quite small. But what makes the A input to "dictate" the value of the output voltage? What prevents the output from being equal to 4.6 - voltage_drop_across_D2, which would increase the potential difference across the diode 1 and the current goint through this diode?
 
You basically can still write the KCL for this circuit, you just need to use the diode equation to express the current and voltage for the diode legs. Write the KCL, and then solve for the currents and voltages of the diodes. You can assume some pretty generic Is saturation current -- just work backwards from the basic diode equation, assume room temperature (in Kelvin) and a 0.6V forward diode drop at some reasonable current like 10mA. That will give you an Is that you can use in your KCL.

Diode Equation: [tex]I_d = I_s ( e^{\frac{q V}{k T}} - 1 )[/tex]
 
Thanks very much for your replies...! Diodes will certainly require more interest and time from my side...:)
 

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