# OR Gate Voltage Drop: A=5V, B=4.6V

• dobry_den
In summary, when the voltage at the input A is 5V and it's 4.6V at the input B, the output voltage still remains at 4.4V. This means that the D2 diode is forward biased and its voltage drop is smaller than the voltage drop of the D1 diode.
dobry_den
Hi! I've got another diode OR gate problem. When the voltage at the input A is 5V and it's 4.6V at the input B, does the output voltage still remain at 4.4V? Does it mean that the D2 diode is forward biased and its voltage drop* is smaller than the voltage drop of the D1 diode?

*the constant-voltage-drop is about 0.6V, thus the voltage drop across the D2 diode should be just about 0.2V

The attached image is a scheme of the OR Gate when A is 5V and B is 0V

#### Attachments

• or_gate.GIF
2.4 KB · Views: 446
Last edited:
Yeah, just the A input is enough to hold up the output. Just get familiar with the V-I plot for diodes, and their behavior will be a lot more intuitive.

Ok. So due to the 5V A input, the voltage-drop across the diode 2 will be quite small (just about 0.2). It's apparent from the V-I plot that the current going through this diode will be quite small. But what makes the A input to "dictate" the value of the output voltage? What prevents the output from being equal to 4.6 - voltage_drop_across_D2, which would increase the potential difference across the diode 1 and the current goint through this diode?

You basically can still write the KCL for this circuit, you just need to use the diode equation to express the current and voltage for the diode legs. Write the KCL, and then solve for the currents and voltages of the diodes. You can assume some pretty generic Is saturation current -- just work backwards from the basic diode equation, assume room temperature (in Kelvin) and a 0.6V forward diode drop at some reasonable current like 10mA. That will give you an Is that you can use in your KCL.

Diode Equation: $$I_d = I_s ( e^{\frac{q V}{k T}} - 1 )$$

Thanks very much for your replies...! Diodes will certainly require more interest and time from my side...:)

## 1. What is an OR gate?

An OR gate is a logic gate in digital electronics that performs a logical operation called disjunction. It takes two binary inputs and produces a single binary output, which is true if either of the inputs is true.

## 2. What is voltage drop?

Voltage drop refers to the decrease in voltage that occurs when current flows through a resistor or other electrical component. It is often caused by resistance in the circuit and can affect the performance of electronic devices.

## 3. How is the voltage drop calculated in an OR gate?

In an OR gate, the voltage drop is calculated by taking the higher of the two input voltages. In this case, the voltage drop would be 5V since it is the higher of the two inputs.

## 4. Why is A=5V and B=4.6V in this scenario?

A and B are just arbitrary values used to demonstrate the voltage drop in an OR gate. In practical applications, these values would be determined by the specific circuit and input signals being used.

## 5. What are the implications of a voltage drop in an OR gate?

A voltage drop in an OR gate can affect the overall output voltage and the performance of the circuit. It can also cause errors and incorrect logic outputs if the voltage drop is significant enough.

### Similar threads

• Electrical Engineering
Replies
4
Views
800
• Electrical Engineering
Replies
14
Views
784
• Electrical Engineering
Replies
21
Views
1K
• Electrical Engineering
Replies
68
Views
3K
• Electrical Engineering
Replies
10
Views
1K
• Electrical Engineering
Replies
10
Views
2K
• Electrical Engineering
Replies
14
Views
2K
• Electrical Engineering
Replies
26
Views
4K
• Electrical Engineering
Replies
12
Views
2K
• Introductory Physics Homework Help
Replies
3
Views
214