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Output waveforms with a clamped capacitor

  1. Feb 23, 2015 #1

    Zondrina

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    1. The problem statement, all variables and given/known data

    For the circuits shown, each utilizing an ideal diode (or diodes), sketch the output for the input shown. Label the most positive and most negative output levels. Assume ##CR > T##.

    The input waveform is given by:

    Screen Shot 2015-02-23 at 5.54.56 PM.png

    I have re-drawn all of the circuits in my solution, which is shown below.

    2. Relevant equations


    3. The attempt at a solution

    I have drawn the circuits next to each output waveform below:

    IMG_0538.jpg

    Do these look alright? In specific part d) and e) I am not 100% sure about.
     
  2. jcsd
  3. Feb 23, 2015 #2

    NascentOxygen

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    In (d) when the capacitor has no discharge path the output voltage will not droop.
     
  4. Feb 24, 2015 #3
    Also, in (a), consider that, at the instant the input flips polarity, the capacitor has just been charged to the supply voltage. Should the voltage across the resistor then be 10 V/-10 V?

    In (e), is the situation really any different than in (a)? There's always a current path through a resistor.
     
  5. Feb 24, 2015 #4

    Zondrina

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    So I'll assume the b) & c) waveforms look okay.

    As for the waveform in a), I don't see anything wrong. When ##v_I = +10V##, applying KVL gives ##v_o = v_I - v_c = 10 - v_c##, which results in the waveform having a peak of ##+10V##. The peak will decrease as the voltage across the capacitor increases. A similar result occurs during the negative half cycle where ##v_o = v_I + v_c = -10 + v_c##. The waveform will have a negative peak at ##-10 V##, which will increase as the capacitor voltage increases. So I believe a) is correct.

    As for part d) I see what's happening now. During the positive half cycles, the output wave will once again obey ##v_o = v_I - v_c = 10 - v_c##, except the peak will be clamped at zero. So the first part of the wave I've drawn is okay. During the negative half cycles, you may as well replace everything with an open circuit and have ##v_o = v_I = - 10V##. So this will be a flat line with ##v_o = -10V## for the negative half cycle. Then ##v_o## will shoot back up to zero, etc, etc.

    I'm pretty sure e) is correct as well now after thinking about it a little bit.
     
  6. Feb 24, 2015 #5
    You should be consistent with the reference polarities you choose. If you assign the reference polarities such that it goes - vI +, + vC -, + vo - as you traverse the loop clockwise, then this equation:
    vo = vI - vC

    is always true.

    If you have vI = 10 V for a while, then vC = 10 V, so if the polarity of vI then flips, you have:
    vo = vI - vC = -10 V - 10 V = -20 V.

    Same thing goes when the polarity of vI flips again.

    Like NascentOxygen wrote, the capacitor has no discharge path. If you think about it, if you let it run for a little while, why should this circuit behave any differently than the one in (c)?

    It's not. The diodes have no effect. You should have the same waveform as in (a), just with a longer discharge time due to the increase in resistance. It says 2R, right?

    Edit: I should have tried to explain more here. In (e), if you consider the instant when vI flips to 10 V, then vo = 20 V, and one diode is forward-biased, and the other is reverse-biased. If you then think in terms of what equivalent circuit you could replace it with..
     
    Last edited: Feb 24, 2015
  7. Feb 24, 2015 #6

    NascentOxygen

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    In the one you have labelled (a), you probably shouldn't assume that vo will drop right back to zero each half-cycle. You haven't got the amplitude right. When the input transitions, it is a step change of |20| volts.

    I'd say (e) deserves more thinking about.
     
  8. Feb 24, 2015 #7

    Zondrina

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    This. I didn't know this.

    So for the waveform in a), the governing equation is ##v_o = v_I - v_c## no matter what. I'm only going to worry about a) for now because if I can't get that one reasoned properly, then I don't feel confident enough about the others.

    So during the instant the positive half-cycle starts, the waveform for ##v_o## starts at ##+10V## since ##v_c = 0V##. Then as ##v_c \rightarrow 10V, v_o \rightarrow 0V##.

    Then at the instant the negative half cycle starts, the waveform for ##v_o## will start at ##-20V## because ##v_I = -10V## and ##v_c = 10V## from the previous cycle. Now as ##v_c \rightarrow 0V##, ##v_o \rightarrow -10 V##.

    Now when the positive half cycle starts again, ##v_o## will shoot up to ##+10V## because ##v_I = 10V## and ##v_c = 0V##.

    Does this sound any better at all?

    EDIT: Here are my revised answers for parts a - d, do they look any better:

    IMG_0539.JPG

    I'll worry about e) once I know I can see what's actually happening.
     
    Last edited: Feb 24, 2015
  9. Feb 24, 2015 #8
    Let's assume the circuit has been running for a while. Based on how the input waveform is presented, I don't think you're supposed to consider any initial condition for vC, but I guess that's open for interpretation. I'm also assuming that ##CR## is high enough to charge/discharge the cap during a half-cycle.

    So if we say it's been running for a while, vo = 20 V since you have vC = -10 V from the previous half-cycle.

    vC charges to -10 V, so vo -> 0 V.

    I think the problem is that you see the capacitor charge to 0 V, but if you leave it for a while, it must charge to the supply voltage, which is -10 V. The waveform repeats here as given before.

    Edit:
    I think you would benefit a lot (I did) from downloading a simulator like LTSpice (it's free!), so you can play around with the circuits and inspect all the individual voltage/current waveforms. It'll probably give you a lot more intuition about these circuits, as they can be quite tricky to get a hold on. It's also great as an aide to check your results.
     
    Last edited: Feb 24, 2015
  10. Feb 24, 2015 #9

    Zondrina

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    So this question is really picky about how to interpret the waveform "coming in". You're saying ##v_o = 20V## initially because you know something about the half period before the first measured ##T##.

    Please assume current actually goes in two directions when I attempt to explain this, but the polarities remain consistent just like they are in post 7.

    During the negative half cycle before the first measured period ##T##, ##v_I = -10V## and so ##v_c = 10V## because the negative side of the capacitor must charge up to the potential of the battery, i.e ##-(-10)V##. Applying KVL would then yield ##v_o = v_I - v_c = -20V##.

    Then during the first measured period, ##v_I = 10V## and ##v_c = -10V## because we know the voltage on the capacitor is positive with respect to the negative terminal from the prior half period. Therefore the positive terminal of the capacitor is negatively charged. Applying KVL again, ##v_o = v_I - v_c = 20V##.

    Now during the next period, ##v_I = -10V## again and ##v_c = 10V## because of the polarity.
     
  11. Feb 24, 2015 #10
    All I'm saying is that, if this assignment wanted you to consider any initial condition for vC(t), then they probably would have marked a location on the graph for t = 0 and given a value for vC(0).

    To me it looks like they want the input waveform to appear as if it has been supplying the circuit for "a while", such that the output waveform is periodic. If it hasn't, then you have to consider what the value for vC is at the start of the input waveform, e.g. if it's 0 V, then the first period of the output waveform will be different from the rest. Since you're also not given such a value (I assume), it seems to me like you're just supposed to show the periodic output waveform.

    I really, really think you should avoid this "sides of the capacitor" view, e.g. "because the negative side of the capacitor must charge up to the potential of the battery" doesn't make any sense. Voltage is specified between two points. You should just stick to the references you have already defined.

    After the capacitor is fully charged during a half-cycle (let's just disregard its asymptotic nature), there's no current in the circuit and thus no voltage across the resistor, i.e., from KVL, vC = vI. If vI = -10 V, then after the capacitor is charged vC = -10 V, and vo = vI - vC = -10 V - (-10 V) = 0 V.

    In your solution, why did you change the reference polarity in (b)? That's not necessary, and I think it's part of why you're confusing some things here.

    If we make the assumptions I've already described, then I think your solutions for (b-d) look fine, but it's a little incomplete if you can't see the relationship to the input waveform.
     
    Last edited: Feb 24, 2015
  12. Feb 24, 2015 #11

    rude man

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    I deleted my previous posts. Your (b) and (c) are correct. (I hadn't noticed the input going negative).

    I think (d) needs more thinking. (d) is correct "in the long run" but perhaps you should show how the waveform changes slowly from t=0 until it reaches what you've shown.
     
    Last edited: Feb 24, 2015
  13. Feb 24, 2015 #12
    I just noticed that you wrote the time constant ##RC## is larger, not smaller, than T, but you show the capacitor discharge fully within a period T in your first solution sheet. You'll have to take that into consideration in your solution for (a) and (e).
     
  14. Feb 24, 2015 #13

    NascentOxygen

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    When you see an asymmetrical waveform as you've sketched for the output in (a), ask yourself why is it asymmetrical? Asymmetry means it has an average value, i.e., it has a DC value. See that capacitor?-- it blocks DC, so the waveform on the right hand side of that capacitor must have an average value of 0 v. Regardless of the waveshape itself, capacitor coupling makes the average value of the output voltage zero (or more precisely, it makes it equal to the voltage that the resistor R is connected to).
     
  15. Feb 24, 2015 #14

    rude man

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    Had to delete an answer.
    Yes, for (a) this is correct,since (a) is a linear circuit.
    Does not apply to (d) or (e), however.
     
  16. Feb 24, 2015 #15

    NascentOxygen

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    Yes, I'm still on linear circuit (a). No point in proceeding to more complicated arrangements until the first is fixed.
     
  17. Feb 24, 2015 #16

    rude man

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    10-4, NO. But the OP did get (b) and (c) right by now.
     
  18. Feb 27, 2015 #17

    Zondrina

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    My concern is part (a). I have a simple RC circuit, and some questions.

    If I say that ##v_I = -10V## just before the first period of the waveform labelled on the input waveform diagram, then ##v_c = - 10V## and ##v_o = v_I - v_c = 0V## since no current is flowing through ##R##. So the graph of ##v_o## is equal to zero currently.

    Then ##v_I## abruptly changes to ##10V##, hence ##v_o## jumps up to ##20V## (ideally) exponentially. This means there is a current across ##R## and hence an output voltage.

    Now I have questions. What actually physically happens at this point? Does the capacitor voltage change at all?

    If ##v_c## does change, does it charge up to ##+10V##? This would mean the graph would start decreasing exponentially from ##20V## to ##0V##.

    Then ##v_I## would change again to ##-10V## and ##v_o## would change abruptly to ##-20V##. Then through another charging cycle, the output would make its way back to ##0V## before changing abruptly again.

    Since ##RC > T \Rightarrow \frac{1}{RC} < \frac{1}{T}##, the output waveform would have a lower frequency, and hence a longer wavelength than the input waveform.
     
  19. Feb 27, 2015 #18

    NascentOxygen

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    The voltage across a capacitor does not change instantaneously. The current through R is changing the charge on the capacitor, over time. If the voltage on one side of a capacitor is abruptly changed by dropping 20v, then the voltage on the other side must drop by that same amount because there has not been any time for the amount of charge on the plates to change in that zero amount of time.

    It is preferable that you phrase the discharge of a capacitor as, e.g., its voltage decreases exponentially from 10 towards zero, as being a decaying exponential you probably haven't determined what it actually drops to, and it's unlikely to reach 0.000v here.

    There is no substitute for a sketch of the waveforms, both current and voltage, to consolidate ones understanding.

    The driving waveform is the input, the output will have exactly the same frequency.
     
  20. Feb 28, 2015 #19

    rude man

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    Not exponentially. A +20V step, as you've shown. Then an exponential decay towards 0V, but never reaching it (see below).
    It eventually charges to +10V if you were to wait long enough for the falling edge. +10V on left side, 0V on right. But in this case T < RC so the output does not get close to 0V.
    The capacitor never charges to + or -10V. The time constant RC is too large. It charges to + and - maybe 5V, depending on RC.
    It does not get close to 0V since RC > T. This would be true if T >> RC.
    No. See previous post. If RC > T the output never gets close to 0V but the frequency is the same. The edges are still 20V in height.
     
  21. Feb 28, 2015 #20

    Zondrina

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    So the graph starts at ##0V## and jumps up to ##≈20V## immediately at the beginning. Then it starts decaying towards ##0V## exponentially.

    So the output never gets to ##0V##, but hovers above ##0V##.

    So are you saying the waveform looks something like this:

    IMG_0548.JPG

    I tried to make it look like the waveform never reaches zero and decays exponentially. Without actual knowledge of the circuit parameters, I can't really tell how fast the exponential decay happens, so my waveform may look a bit "fatter" than what you may have had in mind.
     
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