PCB traces are overheating (due to eddy currents ?)

[Gideon Y]

I’m facing strange phenomenon in voltage multiplier operation – PCB traces are overheating.
Multiplier runs at 50KHz, consumes 40V / 26A and delivers 500V / 2A.

The prototype is continuously monitored by IR camera due to overheating concern. None of electronic components is heating significantly. But very specific regions on PCB traces are overheating. It is not resistance problem - trace width and thickness is far above the requirement. In many places traces are very wide and still overheating.

I suspect that it is due to eddy currents running in circles on lateral plane of the trace.

Questions:
Is my assumption correct ?
Is there any other explanation ?
What can be done to minimize the phenomenon ?
To replace wide traces by bunch of narrow traces running in parallel ?
What about ground plane of PCB – is it beneficial or harmful in this context ?

 

[phyzguy]

I find your explanation difficult to believe at these low frequencies. When you say:

It is not resistance problem - trace width and thickness is far above the requirement. In many places traces are very wide and still overheating.

How do you know this? Do you know how much current is flowing through the traces which are overheating? Perhaps it is much more than you think. I find this the most likely explanation.

 

[Gideon Y]

Current was calculated in all locations along the path, and also measured in several places.
Furthermore, there are capacitors and diodes in current path with not much spare in their ratings. These will overheat first if current is higher than expected.
There might be current peaks, but RMS is well inside limits.

 

[berkeman]

Multiplier runs at 50KHz, consumes 40V / 26A

That's a lot of current for PCB traces. How wide are they, and how many ounces of copper are they (thickness)? Are they covered with soldermask? How long are the traces? Can you post a schematic, layout and an IR picture to show us which nets and traces are having the heating problem?

Have you considered using busbars instead of PCB traces?

 

[Rive]

If it is eddy current, then there should be significant magnetic field around. You can try to capture that field with a similar PCB layer in parallel, which is not connected to the circuit (so, there will be no current through it). If it is also heating up then eddy current is confirmed.

 

[Gideon Y]

That's a lot of current for PCB traces. How wide are they

500 mil. Please note that specific trace which overheats is approximately in the middle of C-D chain and it bears only 6A

and how many ounces of copper are they (thickness)?

2OZ

Are they covered with soldermask?

Yes.

How long are the traces?

5 -10 cm. Actually it doesn't matter, because power dissipation is per length unit.

Can you post a schematic, layout and an IR picture to show us which nets and traces are having the heating problem?

I will do it next Monday.

Have you considered using busbars instead of PCB traces?

It is not possible in this specific design. I have to resolve it by fine tuning rather than by brute force.

 

[Fisherman199]

Trace length matters here, even at the lower frequency. You're certain there's not more than 26A in consumption? You've measured this?

 

[berkeman]

500 mil. Please note that specific trace which overheats is approximately in the middle of C-D chain and it bears only 6A

Hmm, that does seem to be wide enough:

https://www.4pcb.com/trace-width-calculator.html

We'll look at your schematic and layout when you post them next Monday.

 

[essenmein]

Are there any magnetic components in your circuit that maybe have stray fields? I assume not since its a multiplier, but can't hurt to ask.

 

[DaveE]

In my experience designing power supplies for many years, the trace width calculators are terribly unreliable. For modern PCBAs it's not as much about the heat generation as it is about the heat removal. PCBs are terrible heat conductors, and convection cooling works much better for components (that rise above the PCB) than the traces. Of course for internal traces the situation is much worse; in that case you want lots of "thermal vias" to conduct the heat out of the middle.

There is also interaction with other heat sources, so these problems usually can be solved in isolation from the other traces nearby.

Ground planes are really good for improving the heat flow away from hot spots. Also thicker Cu layers are helpful. You might also consider PCB quality; if a layer or area was over etched, that could have an adverse effect.

It may be too late, but component layout is critical. I always preferred to place high current components so I could have traces that were more like small planes (i.e. as fat as they are long) than the conventional linear traces that PCB designers/SW will always give you. You may have to worry about capacitance to the ground planes with giant traces in the HF parts of your circuit though.

I don't know the details of your circuit, of course, but I very much doubt that you have any significant eddy current losses. That would require a very large stray magnetic field, if you are wondering about where the source of such a field would be, then it probably isn't there; i.e. you should already know based on the magnetic structures nearby.

 

[Averagesupernova]

I wouldn't mind seeing a schematic of this with as well as the circuit board layout.

 

[Baluncore]

A power supply that uses an LC resonant converter can be operated with a very high circulating reactive current. If you cannot reduce the circulating current, then it is necessary to redesign the physical LC circuit and switches to avoid using PCB traces.

 

[Gideon Y]

 

[Gideon Y]

 

[Gideon Y]

 

[Gideon Y]

 

[Gideon Y]

 

[Gideon Y]

Schematics - only C-D block is published, driver block omitted. Inductors are not installed.
PCB - brown layer is top side, blue layer is bottom side. There is also equipotential layer ("ground plane") in the middle.
First thermal image shows untreated PCB with partial power applied. Second thermal image shows PCB with several "improvements" and full power applied. For improvement thick wire was soldered near D9-D10 diodes, which significantly reduced trace temperature in nearby region. (this wire is clearly seen in the image). Images are shown upside down to offset inversion made by IR camera.

 

[Tom.G]

It looks like the hot-spots are at feedthru holes. Try filling them with solder to increase their cross sectional area.

Cheers,
Tom

 

[Gideon Y]

It looks like the hot-spots are at feedthru holes. Try filling them with solder to increase their cross sectional area.

Cheers,
Tom

Thank you for help. According to my interpretation of thermal image feed-thru holes are at temperature lower than nearby trace. I therefore conclude that they are being heated by the trace. Filling solder into the holes did not made any difference.

 

[Tom.G]

OK, so much for that! Any chance there is problem with the Ground Plane in the hotspot regions? It obviously comes down to either the current is too high or there is not enough Copper. (Thin Copper perhaps from faulty board manufacturing?)

So it must be time for some actual troubleshooting...

First off, is the overheating occurring at no-load or full-load? If at no-load either something is breaking down or there is a parasitic resonance somewhere. Just waving a scope probe around the board may spot something.

Next would be measuring either the voltage drop across that hotspot region or getting an idea of the actual current.

Unless you have a pre-amp for your 'scope, you probably can't measure the voltage drop, and the current would likely be more informative.

If you have a scope current probe with a high enough bandwidth and insulation, cut the trace and put a loop of wire across the cut for probe access.

A cheap-and-dirty AC current probe, uncalibrated, can be made from a low impedance earbud. Remove the piece that enters the ear canal and the metal diaphragm thus exposed. There is generally a seam in the plastic at that point. The innards are a coil with a permanent magnet for a core. Of course you will have to drive your circuit with only 1 or 2 volts to keep the board voltage levels save to play with... and you will probably need a dummy load. External trigger the scope on the driving waveform so you can see the 180° phase shift as you pass over a conductor. This will give at least a comparative indication of currents and their paths.

Interesting situation, please keep us updated on your findings.

Cheers,
Tom

 

[Rive]

I think it'll be about the ground plane, since many hot spots/areas has no clear indication to existing traces (neither on top or bottom) on the PCB. But I don't have a good explanation yet.

Ps.: if you have a non-populated piece of that PCB and a good capacitance meter then could you please measure some track-to-ground capacitance around the affected area?

 

[Baluncore]

Looking at the circuit diagram, I see 12 triangular loops, each made from a capacitor with two diodes of the Villard cascade multiplier. Diodes are shared between loops. Each loop conducts in the alternate direction. You have built a 50 kHz ground plane induction heater.

I would expect the ground plane below those loops to conduct eddy currents due to the cyclic pump current. I have not been able to decode the exact layout yet, but it may be that some of those loops overlap, or are adjacent to return flux from others and so increase the flux and heating.

It may be possible to layout the multiplier as a transmission line, with the capacitor tracks on opposite sides of the PCB, so the loops have no area in the plane of the ground plane. It might be possible to deliberately overlap pairs of loops so the flux from the two loops cancel.

Alternatively you must remove the ground plane, or slit the ground plane into a comb or a tree.

 

[Gideon Y]

First off, is the overheating occurring at no-load or full-load? If at no-load either something is breaking down or there is a parasitic resonance somewhere. Just waving a scope probe around the board may spot something.

PCB heating occurs only at high load. Also I have sufficient evidence that there are no breakdowns or leakage.

 

[Gideon Y]

Next would be measuring either the voltage drop across that hotspot region or getting an idea of the actual current.
Unless you have a pre-amp for your 'scope, you probably can't measure the voltage drop, and the current would likely be more informative.
If you have a scope current probe with a high enough bandwidth and insulation, cut the trace and put a loop of wire across the cut for probe access.
A cheap-and-dirty AC current probe, uncalibrated, can be made from a low impedance earbud. Remove the piece that enters the ear canal and the metal diaphragm thus exposed. There is generally a seam in the plastic at that point. The innards are a coil with a permanent magnet for a core. Of course you will have to drive your circuit with only 1 or 2 volts to keep the board voltage levels save to play with... and you will probably need a dummy load. External trigger the scope on the driving waveform so you can see the 180° phase shift as you pass over a conductor. This will give at least a comparative indication of currents and their paths.

Thank you, I will keep these tips as alternative direction if present course of research would not yield expected results. Presently I'm assuming that heating is not due to copper resistance to forward current flow, because this is what calculations, measurements and experiments I did so far indicate. I therefore prefer to focus on better understanding of circular (eddy) current effects which may be induced in traces or ground plane by time-varying magnetic fields.

 

[Gideon Y]

I think it'll be about the ground plane, since many hot spots/areas has no clear indication to existing traces (neither on top or bottom) on the PCB. But I don't have a good explanation yet.

I think maybe ground plane "smears" the hot spot. For example, if trace on bottom side overheats, it heats the ground plane and therefore we see it as bigger hot spot not exactly aligned with heat source.

 

[Gideon Y]

Ps.: if you have a non-populated piece of that PCB and a good capacitance meter then could you please measure some track-to-ground capacitance around the affected area?

Yes, this is one of possible explanations. But presently I don't think it is capacitance coupling issue. There are many wide traces on the board. They all (or most of them) should be hot if capacitive coupling was significant. Furthermore, in that case heating should happen even without load. In practice heating happens only in specific places and only at high load.

 

[Rive]

I think maybe ground plane "smears" the hot spot.

I think it is a more likely possibility that the outer layers (between ground plane and the surface) smearing the heating of the ground plane.

This kind of localized heating can happen either by eddy currents or AC coupled to the plane by capacitance.
If you have the track-to-plane capacitance then calculating some current there might be possible (given you know the voltage levels there). But since the heating depends on the current, I think it's more likely to have something magnetic there. Try to apply a small full copper PCB in parallel with the hot areas and make a thermal picture of it. An eddy current should heat it up just like it heats up the ground plane.
You can try to apply some ventilation so it'll be independent to the heating of the ground plane.

 

[hutchphd]

I am no expert in this so please excuse me in advance.
The heated areas occur in places where the density of high current vias thru the groundplane is largest. Does this "threading" of the current back and forth not invite high induced circulating currents in the backplane, particularly in the areas immediately between alternating vias? This would seem to explain what you see.

 

[Gideon Y]

Looking at the circuit diagram, I see 12 triangular loops, each made from a capacitor with two diodes of the Villard cascade multiplier. Diodes are shared between loops. Each loop conducts in the alternate direction. You have built a 50 kHz ground plane induction heater.

I would expect the ground plane below those loops to conduct eddy currents due to the cyclic pump current. I have not been able to decode the exact layout yet, but it may be that some of those loops overlap, or are adjacent to return flux from others and so increase the flux and heating.

It may be possible to layout the multiplier as a transmission line, with the capacitor tracks on opposite sides of the PCB, so the loops have no area in the plane of the ground plane. It might be possible to deliberately overlap pairs of loops so the flux from the two loops cancel.

Alternatively you must remove the ground plane, or slit the ground plane into a comb or a tree.

Yes, I think these current loops are a root cause of the problem.
I doubt that (without heavy simulation) it would be possible to modify trace routing to prevent hot spots created by current loops.
Also I'm somewhat reluctant to remove or cut ground plane. It may resolve eddy current issue but at the same time create many other issues, including transmission line effects, resonance and EMI.
I planed to remove ground plane as last resort.
However yesterday I managed to overcome the problem. I will publish update tomorrow.

 

[Gideon Y]

I managed to overcome the problem. I don't have clear resolution about its root cause, but I found how to eliminate it.

During tests in last weeks (tests for many purposes, not necessary in order to resolve PCB heating) I paid attention that heating of PCB and capacitors strongly linked to amplitude of ripple - i.e. voltage level decrease on capacitors due to discharge during half of clock cycle. There are several factors affecting ripple amplitude, including load current, step capacitance and clock cycle period. No matter what of these parameters changed, if it resulted in ripple amplitude increase, it proportionally increased power dissipation. There can be several explanations for that relationship, eddy currents is just one of them.
I therefore performed frequency scan, and it quickly became evident that system behaves much better at higher frequencies. At clock rate higher than 100 KHz PCB stays cold, as well as as all other components.

The most surprising outcome is that total efficiency raised. It is counter-intuitive. My basic assumption is that almost every system is loosing energy on transitions, due to dielectric and magnetic effects. So more transitions per second means more energy lose.
I don't understand exactly why increase of clock rate has resolved everything so easily.
But presently there is no longer an issue with strange heating of PCB.

Thank you very much for your help !

Gideon

 

[Baluncore]

I doubt that (without heavy simulation) it would be possible to modify trace routing to prevent hot spots created by current loops.

You do not need simulation. You just need to avoid laying it out to look like the schematic circuit.

Run wide tracks like transmission lines, one on top, the counter current below. Split the capacitor patches into two parts, separate on each side of the counter-twisted t'line axis, so the t'line alternates between sides of PCB.

Put diodes along both outside edges of the line, rather than between separate lines of capacitors. That is quite different to the way the circuit diagram is drawn.

Each diode is placed in the top track of a short hairpin line, made from two tracks, one above the other and connected at a patch of thru vias.

Where two diodes are in parallel, keep their adjacent traces separate for as far as convenient, so track resistance can improve balance of diode current. Indeed, your pairs of parallel diodes might be separated onto opposite sides of the line, to service separate sides of the capacitor lines.

LTspice model with layout sketch.

Questions;
1. Is it driven by a square wave from a half? or from a full H-bridge? Voltage?

2. What is the value of the input inductors you were using while it was overheating at 50 kHz? Inductance of input wires will become more important as you raise the frequency.

3. What is the value of your individual capacitors, about 2uF for 50 kHz? That can be halved at 100 kHz to 1 uF.

4. How did you decide the taper variation of capacitance used along the cascade; 80, 40, 27, 20, 16, 14, 12, 10, 9, 8, 8, 7. Do you have a rule for optimum values, or a reference to the analysis?

 

[Gideon Y]

Thank you for useful insights. I will implement them in the next version.

Answers to your questions:

(1) Square wave from full H bridge, 45*2 = 90V p-p

(2) Inductors are not installed, ignore them. They were designated to handle a problem which currently doesn't exists.

(3) In past I used 22uF ceramic capacitors, now I'm using 4.7 uF. In future I will further decrease capacitor values or (preferably) will decrease amount of capacitors per step.
I'm aware that at higher frequency it is possible to use smaller capacitors. Please note however that maximum current allowed per capacitor is lower for smaller capacitors, so there is a limiting factor other than C*F

(4) I reviewed several published methods to select capacitance per step, but eventually decided to use rule of my own: capacitance should be proportional to the current flowing through the step. If you think the rule is incorrect please let me know.