Potential Difference over Capacitors in Series

[nmfowlkes]

Homework Statement

Students perform an experiment using a circuit that contains two parallel plate capacitors. Capacitor C1= 30μF is fully charged and connected to an initially uncharged capacitor C2= 60μF, as shown in the circuit. Which of the following is a correct hypothesis by the students regarding the relative magnitude of the potential difference V1 and V2 across the plates of capacitors C1 and C2, respectively, when the circuit reaches a steady-state?

For clarification, I assume capacitors that are on opposite end of a square circuit are in parallel.

Relevant Equations

What exactly is the significance of the second capacitor's initially uncharged state. I thought my solution would apply but it does not lie among the answer choices.

V1 = Q/30

In parallel: C = C1 + C2

V2 = Q/(60 + 90)

V1/V2 = 3

V1 = 3V2

 

[kuruman]

Hi @nmfowlkes and welcome to PF.

Please show the circuit. Also, "For clarification, I assume capacitors that are on opposite end of a square circuit are in parallel" is not clear enough to convey what your assumption is. Two capacitors are in parallel if they have the same potential difference across their terminals. That's what you should look for as a criterion.

Edit: Please also include the answer choices.

 

[DaveE]

Looks OK to me. Except for a typo in line #3: V2 = Q/(60 + 90) → V2 = Q/(60 + 30). I assume you mean V1 is before and V2 after, since there is only one voltage across parallel capacitors. So, perhaps there is a misunderstanding of the question?

 

[nmfowlkes]

Yes Dave, the question was asking about the difference across the two capacitors. V1 = V2 as they are in parallel. I did not understand it.

 

[DaveE]

Yes Dave, the question was asking about the difference across the two capacitors. V1 = V2 as they are in parallel. I did not understand it.

Yea, something's wrong. There is no voltage difference after they're connected in parallel, according to me.

Anyway, slightly off-topic, but.. I dislike this question (even though it's always asked) a circuit with two capacitors at different voltages suddenly connected in parallel (zero resistance switch) is fundamentally ill-defined; a paradox with infinite currents, etc. The real answer is an oscillation that has no steady state. But that's a bit beyond this level, I think. You can find a bunch of discussion of this in older posts.

 

[kuruman]

To @nmfowlkes :
Can you please post the circuit that goes with this question for the benefit of those of us whose imagination is not vivid enough to reconstruct it from the problem statement?

 

[hutchphd]

The real answer is an oscillation that has no steady state. But that's a bit beyond this level, I think.

Depends upon your level of reality. An ideal capacitor connected with ideal wires will oscillate because there is inductance (even for "ideal" wires I think) and it will oscillate ideally. A "real" capacitor has both inductance and resistance and so will oscillate with a time decay to steady state asymptote. @DaveE knows this but I find it amusing.