RFID rectifier Tag - Issues regarding PCE

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SUMMARY

The discussion centers on the challenges faced while designing an RFID rectifier using 180nm technology, referencing an IEEE paper that presents results for 130nm and 350nm technologies. The user reports achieving only 8% power conversion efficiency (PCE) with a 500mV to 700mV input voltage, despite expectations of 20-30% efficiency. The current at the load remains constant at 4uA, and increasing the number of rectifier stages did not yield the anticipated improvements in efficiency. The user seeks advice on enhancing PCE for their circuit design.

PREREQUISITES
  • Understanding of RFID rectifier design principles
  • Familiarity with semiconductor technology, specifically 180nm technology
  • Knowledge of power conversion efficiency (PCE) metrics
  • Experience with circuit simulation and analysis tools
NEXT STEPS
  • Research methods to optimize power conversion efficiency in rectifier circuits
  • Explore multi-stage rectifier designs and their impact on efficiency
  • Study the effects of load variations on rectifier performance
  • Investigate circuit simulation tools for analyzing voltage conversion efficiency
USEFUL FOR

Electrical engineers, circuit designers, and researchers focused on RFID technology and power conversion efficiency improvements.

shaikss
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Hi,

I am designing a RFID rectifier. I am referring a IEEE paper for this purpose.
The paper has shown results for both 130nm and 350nm technologies. I have chosen 180nm technology.
So, I expected results in between the above technologies. To my surprise, the results are weird - undesirable.

Let me explain you the stuff:

I have used the Widths as mentioned in the reference paper. The rectifier rectifies the input ac voltage from 350mV with an efficiency of 50%. So, I expected that I will be achieving atleast 20-30% of efficiency for 500mV to 700mV of input voltage. To my great surprise, I achieved efficiency less than 8%. I tried to use multi stage of rectifier; even then efficiency is less.

The current at the load is around 4uA. I varied the load from 10k to 100K. When load is 100k, current is 4uA. I varied the input voltage from 100mV to 1V (Peak values). The input current is increasing as the voltage is increasing. That is true. But I expected that the current at the input is same, when I go for 2-stage rectifier. I was shocked to see an increase in the ac current at the input end for 2-stage rectifier.

What should I do in order to increase the efficiency? DC load current is always around 4uA. I am able to see the voltage conversion efficiency. But I couldn't achieve power conversion efficiency. What should I do in order to improve PCE for the attached circuit?

Attached is the circuit of 2-stage rectifier figure as well as the reference IEEE paper.
 

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  • high_eff_cmos_rec_low_pwr_RFID_Tags.pdf
    high_eff_cmos_rec_low_pwr_RFID_Tags.pdf
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Engineering news on Phys.org
So you have an IC fab facility available where you have fabricated this prototype? Can you post your IC design files for us to check over? Thanks.
 

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