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Sketch Vin-Vout in MOS transistor

  1. Jun 17, 2013 #1
    Can you help me check my work and tell me what is the application of the circuit?
    1. The problem statement, all variables and given/known data
    Sketch Vout versus Vin as Vin varies from 0 to VDD. Identify important points.


    2. Relevant equations
    MOS transistor equations in triode and saturation modes.
    3. The attempt at a solution
    attachment.php?attachmentid=59640&stc=1&d=1371488951.jpg
    attachment.php?attachmentid=59641&stc=1&d=1371488951.jpg
    attachment.php?attachmentid=59642&stc=1&d=1371488951.jpg
     

    Attached Files:

  2. jcsd
  3. Jun 18, 2013 #2

    rude man

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    Gold Member

    I'm not going to check your math but I can tell you that this configuration is known as the common-gate configuration, analogous to the common-base mode of a BJT.

    EDIT: the purpose is to improve frequency response by eliminating the so-called "Miller effect". Put a small capacitance Cgd in the common-source configuration & you will see this. The price is a lower input impedance.

    Adding Rf reduces the gain ∂Vout/∂Vin but it does linearize it somewhat (for low values of -Vin, or in cutoff mode, ∂Vout/∂Vin = R/Rf where R = Rd||Rf.
     
    Last edited: Jun 18, 2013
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