The JK flip flop nand gate circuit that I built does not simulate

[NYAME EPHRAIM]

 

[CWatters]

Circuit looks ok to me. What do you mean by "does not simulate"?

 

[CWatters]

I don't know if this is the problem as it depends on your simulator but...

If you built this circuit and powered it up what would the output state be? Q=1,0 or indeterminate?

 

[berkeman]

@NYAME EPHRAIM -- is this for a schoolwork question or schoolwork project?

 

[NYAME EPHRAIM]

@NYAME EPHRAIM -- is this for a schoolwork question or schoolwork project?

project it does not

I don't know if this is the problem as it depends on your simulator but...

If you built this circuit and powered it up what would the output state be? Q=1,0 or indeterminate?

it does not even simulate in the first please

 

[NYAME EPHRAIM]

Circuit looks ok to me. What do you mean by "does not simulate"?

it does not work when i simulate it, i don't know if the nand gates i used are the current gates or they are specifications ?

 

[NYAME EPHRAIM]

project it does not

it does not even simulate in the first please

well when you power it up the output should be zero, one you change the stat ot any J or K, then one of the outputs will be high, the you can use the clock pulse to change the output state, as you apply the pulse the output state change one side becoming high and the other low!

 

[berkeman]

well when you power it up the output should be zero, one you change the stat ot any J or K, then one of the outputs will be high, the you can use the clock pulse to change the output state, as you apply the pulse the output state change one side becoming high and the other low!

What software are you using to simulate it? Does the software have a way you can label all of the node voltages? How do you define the 2 inputs at the left?

If you put a vitruial oscilloscope on the clock input, do you see the clock that you expect?

 

[Chris Riccard]

make sure you can drive the leds with ttl or your cmos output, you may need a buffer and current limiting resistors. I'd try driving all the input gates high (including the clock) first to test the circuit.

do they still use logic pulsers, tracers and breadboards or am I old fashioned?

 

[CWatters]

it does not work when i simulate it...

What does it do?

Are you applying signals to the JK inputs or are they fixed at 00?

 

[CWatters]

well when you power it up the output should be zero, one...

Why?

 

[Svein]

A JK flip-flop is considerably more complex:

 

[mfb]

A JK flip-flop is considerably more complex:

Only if you want the "clear" and "set" inputs. As basic design the layout in post 1 should work. It https://www.electronics-tutorials.ws/sequential/seq_2.html, however.

 

[eq1]

it does not even simulate in the first please

Does this mean the tool can't solve for the dc operating point before doing the transient simulation?
Something like what spice might do.
The tool might not be able to deal with the feedback paths and you might be required to specify an initial condition at each gates output.

 

[CWatters]

Sadly the OP hasn't said what he means by it does not simulate. So its impossible to help him.

 

[Baluncore]

It is probably a simple problem.
Have you set the clock frequency and turned on the clock ?

Have you built a simple RS flip flop and made it work ?

 

[Shane Kennedy]

A JK flip-flop is considerably more complex:
View attachment 225532

Probably because the OP's circuit doesn't have Set and Clear inputs. Either way, unless the simulator is told what the initial state is, it can't know. A question I asked in an interview: What is the output state of such a circuit. Answer: Don't care. Actually, don't KNOW. If the output can detonate a bomb, you very much do care. You don't care what the J & K inputs are until you clock it, and if the inputs cause it to toggle, you still don't know what the outputs are.

 

[LuisP]

That is an RS flip-flop.
Not a JK.
JK is based on RS but with much more lines.
You probably need to set initial output values in order to simulate, if the simulator supports it.
If R=1 and S=1, the result would be undetermined, and flipping between 0 and 1.

 

[CWatters]

I think we are wasting unless the OP comes back and provides more information.

The fact that the initial state is indeterminate has been pointed out about five times so far.

 

[gary350]

I see no battery or power supply? There are no other parts, capacitors, resistors, diodes? What is the part number of the IC? Do google search for the part number you will find lots of circuit drawings online. Look up the part number is Cmos cookbook or TTL cookbook.

 

[Baluncore]

I see no battery or power supply? There are no other parts, capacitors, resistors, diodes?

That is because the schematic is a logic simulation only, not hardware.

@ NYAME EPHRAIM, what is the simulation package ?
Does anyone recognise the simulation package. Is EEW a clue ?

If you want to simulate logic with a free open source package look here ...
https://en.wikipedia.org/wiki/Logisim
https://sourceforge.net/projects/circuit/?source=directory

 

[Svein]

Just a quick look - it seems to me that the OP circuit will oscillate when J=1, K=1 and Clock=1...

 

[CWatters]

The OP hasn't answered previous questions or contributed to this thread for 6 days.

 

[berkeman]

The OP hasn't answered previous questions or contributed to this thread for 6 days.

Yes, and yet he just posted a new thread start in the schoolwork forums 30 minutes ago (which was deleted for several reasons). So it seems he may not be interested in this thread anymore for some reason...