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antonantal
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What is the mechanism used for programming FPGAs? Is it the same as for EPROMs?
I know (although not sure this is correct either) that in EPROMs, for setting a transistor to "1" a control gate is used which is placed in the oxide layer of the MOS transistor and by applying a voltage between the drain and the control gate you will charge the control gate (for NMOS) with electrons (like the "-" plate of a capacitor) ,and thus increase the threshold voltage of the transistor which therefore will not conduct regardless of the voltage you apply on the gate.
I know (although not sure this is correct either) that in EPROMs, for setting a transistor to "1" a control gate is used which is placed in the oxide layer of the MOS transistor and by applying a voltage between the drain and the control gate you will charge the control gate (for NMOS) with electrons (like the "-" plate of a capacitor) ,and thus increase the threshold voltage of the transistor which therefore will not conduct regardless of the voltage you apply on the gate.
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