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RC circuit, discharge with digital signal from FPGA

by ttsky
Tags: circuit, digital, discharge, fpga, signal
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Apr6-14, 07:03 AM
P: 20
Hi all,

my task is to measure the charge time of an RC circuit with a counter using FPGA, once the cap is charged, i must discharge it again for next input. Idea is to discharge it with a signal from FPGA, but what sort of circuit would allow this without discharging the cap prematurely?

if it helps, the circuit is for a 4x4 matrix keypad, row and colums tied to resistors and a cap, each button press should produce a diffrent charge time, i need the caps to be discharged before next keystroke.


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Apr6-14, 01:02 PM
P: 93
I'm not sure I understand your stated task. Are you saying that you need to do this without any external supporting circuitry for the FPGA or do you intend on using external components?
You can use the FPGA alone, but your resistor values will need to be increased and the cap value lowered such that the FPGA I/O pin can be used as a discharge by pulling the cap low from a tri-state output (probably through a low value resistor to limit the current). To do this you need to set the resistor and cap values that the current in the discharge side is below the rated sink current of the I/O pin for the selected part. Search through the app notes of the various FPGA manufacturers about using their parts for A/D or with special inputs dedicated as comparator - I know Lattice has notes that describe this use.
Apr6-14, 05:31 PM
P: 561
You can use a GPIO - directly to a Base on an NPN, with a resistor to limit current. Cap ( to be discharged) -- Resistor -- Transistor Collector -the Transistor Emitter to ground.

Apr7-14, 08:31 AM
P: 20
RC circuit, discharge with digital signal from FPGA

Thank you for reply, There are no limitations on external circuits, however if i don't have to then i wont, i will explore those options and post an update soon.


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