Revolutionizing SMPS Efficiency with Innovative Pulsed Operation Technique

[girts]

Hi, I was thinking about smps power supplies and for the record I have built a few myself, so normally in a more powerful smps you want to implement a PFC stage for both "grid health" and efficiency, although I assume usual linear supplies with a mains transformer and a bridge rectifier with filter caps at the secondary also suffers the same problems and would benefit a PFC stage? I do realize it would be impossible to implement such a stage because the input AC isn't rectified into DC.Now my main question is this, and it basically asks can something like that work and has it been tried.
So Instead of having the usual rectifier and filter caps at the smps input and then chopping up the DC to make a high frequency pulse AC to feed into the ferrite transformer, can't I just take the input bridge rectifier and then take it's output which would be in the form of half sine waves and put that directly into a switch (MOSFET/IGBT) which is driven with a carrier wave frequency and then feed this signal into the transformer?
The idea is essentially much like AM modulation, the AC sine wave has low frequency so would be of no use for a small smps transformer, but if I chop up the sine wave into individual peaks and feed those into the transformer I have achieved pulsed operation of the transformer so now at the secondary I can put a capacitor across the windings and since the time inbetween the fast pulses would not be enough to discharge the capacitor I would get back a 50hz sine wave.My idea is basically that since such an approach uses equally every part of the sine wave that would increase efficiency and would not require additional PFC stage or filter caps, the drawback that I can think myself is that the transformer would need to be larger for the same power because rectified DC pulses have all equal potential while here the individual pulse potential is dependent on its place in the sine wave.
I would like to hear some comments about this idea, thanks

 

[berkeman]

normally in a more powerful smps you want to implement a PFC stage for both "grid health" and efficiency, although I assume usual linear supplies with a mains transformer and a bridge rectifier with filter caps at the secondary also suffers the same problems and would benefit a PFC stage? I do realize it would be impossible to implement such a stage because the input AC isn't rectified into DC.

The input stage for a typical 2-stage PFC power supply is often a Boost stage, so it does actually use a rectifier and the Boost stage to make HV DC.

The idea is essentially much like AM modulation, the AC sine wave has low frequency so would be of no use for a small smps transformer, but if I chop up the sine wave into individual peaks and feed those into the transformer I have achieved pulsed operation of the transformer so now at the secondary I can put a capacitor across the windings and since the time inbetween the fast pulses would not be enough to discharge the capacitor I would get back a 50hz sine wave.

My idea is basically that since such an approach uses equally every part of the sine wave that would increase efficiency and would not require additional PFC stage or filter caps, the drawback that I can think myself is that the transformer would need to be larger for the same power because rectified DC pulses have all equal potential while here the individual pulse potential is dependent on its place in the sine wave.

That is essentially what the first Boost stage of a PFC SMPS does -- it follows the input voltage rectified half-sine wave. The main other thing it does is PWM the ON time of the MOSFET switch to take an amount of current from the input sine wave that corresponds to the input voltage. That way it makes the input to the PFC supply look pretty "resistive", with the average input current directly proportional to the input voltage.

Does that make sense?

 

[girts]

sure berkeman that makes sense, I would suspect that the PWM is such that the pulses are shorter at the peak of the sine wave and longer at the rise and fall of the wave so that the rectifier and the filter caps don't just "ride the top" of the sine peaks. Is it so?Although I do believe I understand this idea, I still didn't hear whether the way I described it would make sense to build, because with a separate PFC module you still need switch/es inductor etc. I was thinking just using the sine wave directly and due to the short pulse carrier frequency chop up and use equally every part of every half period, this would atleast in theory require only a bunch of rectifier diodes and two mosfets and a transformer with no filter caps or other expensive or large parts.

https://failiem.lv/u/bwgu9s7z#/view/20180118_094209.jpg

here is the schematic that I quickly made, maybe that would be better than my long explanations.
Theoretically one could even not use the diodes but instead use the so called "active bridge" and that could also do the function of pulsing up the input.
Please tell me is this reasonable and what drawbacks would it have ? Because just in case I would like to try build such a smps if it atleast works the way I think it should. Surely some EM filters at the input would be required in any case

 

[Tom.G]

The concept looks doable, with a few things to pay attention to.

• Since the MOSFETs are connected to operate from different sides of the powerline, you will need a separate, isolated, drive circuit for each... or at least transformer coupling for the Gate drives
• The transformer must be designed to operate at the switching frequency, not line frequency.

If you opt not to use transformer Gate drive, I suggest the MOSFETs be configured as Common Source rather than the indicated Source Follower design. This would signifcantly simplify the drive circuit design.

Have fun! (and remember to keep one hand in your pocket or behind you back when working with line voltage.)

 

[girts]

Yes ofcourse I do realize that the smps transformer has to be suited to the carrier frequency not line frequency, that is after all the intention to have as few parts and as robust a device as I can get but to keep the sizes minimal.

Now I did not entirely got your message about the gate drive, I think it is because now one mosfet would be the high side one and the other one the so called " low side" one and that means they require different potentials for gate driving voltage correct?

So if I understand you correctly , the wise thing to do here would be to move the "high side" mosfet that is right after the diode that is attached to mains phase to the the diode that is after the transformer primary at the neutral wire? Have I understood you correctly?
maybe you can draw me a quick redraw of my schematic in order for this to be clearer?Oh also I wonder does anyone know whether such approach has been used commercially or industrially somewhere, I would love to look at the schematics but I myself couldn't find anything.thank you

 

[Windadct]

This topology is a http://www.jugandi.com/eXe_Projects/Power_Supplies/pushpull_converter.html, usually a DC/DC stage but this similar topo has been https://pdfs.semanticscholar.org/3f8d/21250a0ff0ba0445e07484a1b75ca208d618.pdf - still with an input bridge.

If you came up whit this on your own good thinking.

It does have drawbacks - no freewheeling path for the current, so emi at switching for example, so limited in current.

 

[Averagesupernova]

No matter what, don't we require more current in the first 90 degrees of the AC cycle in order to fill in the remainder no matter how we do it? Isn't this asymmetry what causes issues on the power line? Maybe not the only thing that causes issues but it is a big source of power line harmonics.

 

[berkeman]

don't we require more current in the first 90 degrees of the AC cycle in order to fill in the remainder no matter how we do it?

For good power factor correction at the input to the SMPS, you want to follow each half-cycle of the AC voltage and draw the average current in a direct ratio to that input voltage. That makes the input characteristic look (mostly) resistive, with Iin = Vin/Reff. Because you are still doing switching on the input current waveform, there will be some harmonics generated, but usually with just a little bit of high-frequency filtering, you can meet the regulatory limits for harmonics on the powerline.

The PWM of the current at the input stage looks something like this, in order to draw an average current from the powerline that is tracking the input voltage waveform. I use this technique in my Boost input stages for PFC power supplies:

http://cr4.globalspec.com/PostImages/200911/PFC_current_waveform_18F5EAD9-CA6B-5E4E-250950656C4D83E6.JPG

 

[Averagesupernova]

Ok so as I understand it, we use a switcher that chops the sine wave up without any capacitive filtering ahead of the switcher and run the switcher in boost mode to get a high voltage DC supply. But surely unless we run switcher so that the duty cycle is much larger when the sine wave is close to zero we will have a lot of 120 hertz ripple. Something needs to fill in the area between peaks. A plain old capacitive filter after the rectifiers would always place heavy current draw in the area on the sine wave that moves away from zero. I can see where the above scheme changes that but don't we simply do it twice as often? So the result would be an improvement in power factor but aren't we prone to adding a harmonic to the line at 120 Hz (USA).

 

[Tom.G]

A plain old capacitive filter after the rectifiers would always place heavy current draw in the area on the sine wave that moves away from zero. I can see where the above scheme changes that but don't we simply do it twice as often?

Exactly the same thing happens with a bridge rectifier and filter cap directly connected to the line. There is an inrush current to charge the cap every time the line voltage exceeds the cap voltage. Both configurations are a non-linear, harmonic load. The switcher, fed from unfiltered rectified line voltage, puts the switching transients at the higher switching frequency (easier to filter) rather than at twice line frequency. (and you can use a smaller transformer, but need a bigger filter cap on the output)

 

[Averagesupernova]

Exactly the same thing happens with a bridge rectifier and filter cap directly connected to the line. There is an inrush current to charge the cap every time the line voltage exceeds the cap voltage.

Yes, that's not in question. It's exactly what I was referring to.

Both configurations are a non-linear, harmonic load. The switcher, fed from unfiltered rectified line voltage, puts the switching transients at the higher switching frequency (easier to filter) rather than at twice line frequency. (and you can use a smaller transformer, but need a bigger filter cap on the output)

My point is that the output of the boost stage will likely have a large ripple voltage at 120 hertz as the boost switcher is fed with unfiltered full wave rectified sine wave. I am not concerned with the noise caused by the switcher as this is more easily filtered than 120 hertz. In order to smooth out the 120 hertz I don't see how it is possible without either wrecking the power factor or drawing current off the line in such a manner that will add a second harmonic of the line frequency. This was the purpose of my last post.

 

[Tom.G]

Ahh! Agreed. The same, or very similiar, 120Hz line current ripple occurs in either case. The switching stage adds its own ripple as a tradeoff for easier/smoother control of output voltage. With perhaps the possibility via duty cycle shaping, of smoothing that 120Hz line current spike near zero-crossing.

Are we talking about the same thing now?

 

[Averagesupernova]

We are a lot closer to talking about the same thing. I would assume that we could modulate the duty cycle of the switcher throughout the sine wave to help smooth the output of the boost stage. This will cause more current drawn as the voltage is about zero. Does this not draw current at periodic rate that would be twice the line frequency? This will put a harmonic on the line that is twice the line frequency. Do you agree?

 

[Tom.G]

Yes, mostly. I suppose it could be done in such a way as to result in just a phase shift of the current, but that would mess with the Power Factor.

I think we are straying rather far from the OP's question here. Shall we agree to agree/disagree and try to keep the Original Inquirer enlightened?

 

[girts]

No folks you are not straying anywhere here, even though the last few posts were not entirely on subject they were very close and the PWM PFC subject is also what I am interested in.
So okay back to where I left, my idea is quite simple, I wonder how robust and simple/failproof an SMPS I can make in order for it to be not just powerful but also efficient and with good power factor.

Now I made some changes to the schematic, based on the advise you gave here and also on some thinking myself, by the way yes @Windadct I did came up with this idea mostly myself as I am too lazy to go through all the numerous smps related electronics tutorials that are on the internet, although I have a somewhat ok understanding of the general topologies used in these devices.
I put both of the switches at the low side of the circuit so that they would work at a more forgiving environment and also so that the drive circuit could be made easier in order for me to be able to use of the shelf driver purpose IC's.
I've added two additional diodes after the ends of the primary windings before the switches, my thought was to prevent any backcurrent or spikes resulting from the switching in the transformer although I am not 100% sure about the necessity of those diodes, maybe some comments?

The general idea as can be also seen in the pictures I have provided in the link is that after the line rectifier I end up with sine wave half periods, I feed those half periods in the center tap of the primary winding and pulse them out with the help of two switches, ideally with 50% duty cycle there is almost no deadtime between the pulses but in this configuration it should pose no problem for the switches, as can be seen in the pictures because of the arrangement of my primary windings I would get a secondary output waveform that resembles a double pulsed sinewave, where each next pulse if of opposite polarity but a corresponding amplitude to the place at which it would be on the input bridge rectified half period.
Now once I add a bridge rectifier at the transformer secondary all the negative pulses get turned into positive ones together with the ones that are already positive so I end up with an almost linear sine wave half period that is made up of individual peaks spaced closely together, atleast in theory, so this should minimize ripple and emi, once I add sufficient filtering capacitance I should be able to get DC, just as If I added the same filter caps on the primary side right after the bridge rectifier, only now I have galvanic isolation and voltage step up/down function and hopefully a still small transformer in terms of size and weight since it operates on pulses, or I could say with my drive carrier frequency.
Now a simple addition could be a frequency based secondary voltage regulation, where if the secondary load is high and voltage begins to drop the primary drive frequency is increased by feedback, this would probably have only limited range for control but still,
basically the sine wave should get used equally in all amplitudes not just the peaks, and the drive carrier frequency should be optimized for the specific transformer so that most of the energy is passed through from each pulse.the link to the drawings
https://failiem.lv/u/68guywsn#_

Ok any thoughts

 

[Rive]

Ok any thoughts

I think you would profit a lot by looking up how PFC is done in LED driver circuits (which works from line voltage).

The main problem is, that this simple way you have a too wide range of input voltage: this means that your SMPS must be able to work both in boost and buck mode (and has to be able to switch between the two hundred times a second).

 

[girts]

Ok I understand your concern but from a purely discrete parts physics issue what do the mosfets or the transformer much less the secondary side care about this widely varying input voltage level? I'm not asking this from ignorance rather from a curiosity viewpoint.

Because even though the pulse frequency would be high the rate of voltage change is only the mains rectified half cycle one which would be 100 half cycles a second where I live.

I will look ip the led drivers you mentioned

 

[berkeman]

But surely unless we run switcher so that the duty cycle is much larger when the sine wave is close to zero we will have a lot of 120 hertz ripple.

That's why you follow the Boost stage with a Buck stage or Flyback stage. The Boost output voltage needs to be high enough so that the ripple on it does not compromise the output switching stages. The job of the Boost input stage is to present a quasi-resistive load to the AC Mains input, and the job of the 2nd stage is to make the output rails off of the Boost's output storage cap.

There are more elegant ways to do a PFC switcher, where you have a single stage running in Buck/Boost mode, but I'm less experienced with those supplies.

http://www.st.com/content/ccc/resou...df/jcr:content/translations/en.DM00088087.pdf

 

[berkeman]

I am too lazy to go through all the numerous smps related electronics tutorials that are on the internet, although I have a somewhat ok understanding of the general topologies used in these devices.

I would recommend going through them anyway, and maybe looking through a couple textbooks on the subject. There really is a lot of good information in that material.

How versed are you in feedback system design? Closing the control loop of an SMPS (or multiple loops) is a significant part of the design.

These are the main textbooks that I have used in my work... (plus of course many App notes from control IC vendors)

 

[Svein]

And - I add this from experience - the radiation from a SMPS depends heavily on the layout of the circuit. I have measured intense radiation from a perfectly good SMPS with too long tracks in the main switching leads.