Femme_physics
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I like Serena said:No exaggeration.
But shouldn't each NAND gate have exactly 2 inputs?
Like this:
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And you appear to have drawn a thin rectangle before each NAND gate.
What does that represent?
I intended to try and get the answer for the question but if there's a + C then I made a mistake it appears. What I really wanted is what you wrote at the end of that post. Is it all about just trying to build it via experience or is it about building a truth table and doing it methodically and schematically in a straightforward fashion?Is that what you intended?
Femme_physics said:I intended to try and get the answer for the question but if there's a + C then I made a mistake it appears. What I really wanted is what you wrote at the end of that post. Is it all about just trying to build it via experience or is it about building a truth table and doing it methodically and schematically in a straightforward fashion?
Whatever works for you.
Systematic and methodical is good. :)
On the wiki page for NAND logic, they give a couple of building blocks to create the various logic operations:
http://en.wikipedia.org/wiki/NAND_logic
With it you can build up your schematic.
Femme_physics said:I understand what you mean-- and I think I got it