# Building a logical gate function with NAND gates only

1. Feb 12, 2012

### Femme_physics

Last edited by a moderator: May 5, 2017
2. Feb 12, 2012

### I like Serena

No exaggeration.
Building a circuit from NAND gates does require a lot of gates.

But shouldn't each NAND gate have exactly 2 inputs?
Like this:

And you appear to have drawn a thin rectangle before each NAND gate.
What does that represent?

Did you perhaps intend something like:

Since this is the way to construct a NOT gate from a NAND gate.

Last edited: Feb 12, 2012
3. Feb 12, 2012

### I like Serena

Let's zoom in on the second sets of inputs for a minute:

The first NAND gate has the output $\overline{AD}$.

And the second NAND gate has the output $\overline{\overline{AD} C} = AD + \overline{C}$.

Is that what you intended?
Or did you really want $A\overline{C}D=AD\overline{C}$?

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4. Feb 12, 2012

### Ouabache

3 input NAND Gates are allowed and often used. Unless the question specified using 2-input gates, but it doesn't appear so.

5. Feb 12, 2012

### Femme_physics

Yes, Quabache is right we're allowed to use 3 inputs, though 1 input probably not...

You're right-- I'm not sure where I've seen it, but I can see that you're right (as per usual), that's not the sign for a NAND gate.

I intended to try and get the answer for the question but if there's a + C then I made a mistake it appears. What I really wanted is what you wrote at the end of that post. Is it all about just trying to build it via experience or is it about building a truth table and doing it methodically and schematically in a straightforward fashion?

6. Feb 12, 2012

### I like Serena

Whatever works for you.
Systematic and methodical is good. :)

On the wiki page for NAND logic, they give a couple of building blocks to create the various logic operations:
http://en.wikipedia.org/wiki/NAND_logic
With it you can build up your schematic.

Myself I like to work backward as follows.

You know you want to end up with $AD\overline{C}$.
Last thing in a NAND gate is the NOT.
So before the NOT, you want to have $\overline{AD\overline{C}}=\overline{AD} + C$.
But you can't make an OR directly from an NAND gate, so first you would use a NAND as a NOT gate.

Working backward you would have the 3 inputs $A$, $D$, and $\overline{C}$ for a first NAND gate, followed by the NOT construction.

You're left with only constructing $\overline{C}$ and I think you already know how. ;)

Last edited: Feb 12, 2012
7. Feb 12, 2012

### Femme_physics

But that's the question. Is there another method, or is this all about trial and error?

Yes, thanks, I've used a similar page trying to do this :) I'll give it another go

8. Feb 12, 2012

### I like Serena

I have the impression you were following a proper method.
Verifying your result showed a little mistake however. ;)
I'm sure you'll get it.

9. Feb 12, 2012

### LCKurtz

Look at what happens if you factor the $A\overline B C$ out of the last two terms before you draw the circuit.

10. Feb 13, 2012

### Staff: Mentor

There is a lot of redundancy here. The expression can be simplified before you start to implement it using gates. LCKurtz gave you a hint, which raises the question in my mind: are you certain that you have correctly reproduced the expression that you are realizing with gates?

11. Feb 14, 2012

### Femme_physics

Last edited by a moderator: May 5, 2017
12. Feb 14, 2012

### Staff: Mentor

Method looks right.

13. Feb 14, 2012

### I like Serena

Very good! You got it!
And very creative to put a double bar over it and break it up!
I also like how clearly you explained what you did and how you showed a nice simple solution.

This time around there appear to be no beetles scurrying away. ;)

Last edited: Feb 14, 2012
14. Feb 14, 2012

### Femme_physics

LOL

Thanks for the help ILS, everyon. Glad I got it right.