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Complete Noise Analysis: to find the minimum detectable signal

  1. Jun 2, 2016 #1
    Problem Statement:

    my aim is to digitalize a 10ns narrow pulse coming from a photo diode with current ranging from 10nA-70mA, as its impossible to cover this dynamic range of >60dB using a single TIA i have an option of separating it to two channels as below using two diodes ofcourse

    Lowest Sensitive Channel: I-V through resistive Drop technique
    followed a single comparator can be thought of implemented, so a 250uA – 70mAthrough a 50ohm resistor resulting in a drop of 12mV - 3.5V , followed by a pico second comparator to sense

    suggest me also any implications with this approach, but the main problem lies with sensing lower currents

    High Sensitive Channel: 10nA (should be adjusted ; study is towards, how far it can be adjusted) – 250uA – TIA Technique

    Note: Both of the channels can produce maximum of 70mA when saturated, so a protection circuit is also need in both cases as bias voltage is 12V,which i don’t want to discuss here, when tried to discuss experts gave me a tight slap http://electronics.stackexchange.com/questions/235157/limiting-current-from-a-photo-diode-to-tia [Broken]

    This analysis would have been done long before, in search of other techniques i have procrastinated this, for which i feel quite idiotic

    After some useful comments said here i just wanted to see this, how far i can go with a TIA

    Let’s see what amount of noise i will have, with my requirements

    Photo Diode is this Opamp is 6269-10

    a Noise model of TIA CUFX0.jpg

    Calculating the Equivalent input noise of an opamp from the standard expression

    HmwD5.png

    Reference:surprisingly the application note tries to sense 10nA - 1uA using their TIA but i did not get how they are able to sense 10nA in their example at a BW of 80MHz,anyways we will come back to the calculation

    The components being input spot noise, noise voltage term, thermal noise term, and capacitive noise term respectively

    1. Current noise term : In = 7pA/rtHz

    In @ 200MHz (even if rise time is 2ns(photodiode rise time) it corresponds to BW = 0.35/2ns which is 175Mhz, so let’s go by more +25MHz) = 7pA * sqrt(200M)= 98.9 nA = nearly 100nA

    2. Voltage noise term : en = 5nV/rtHz

    ( i have seen a 1nV/rtHz fully differential opamp i don’t know whether it can be used for the purpose of TIA, experts have to suggest is it desirable to use http://cds.linear.com/docs/en/datasheet/6409fa.pdf [Broken]but datasheet seems like i cannot go for high gains with this )

    Voltage noise term = en/Rf

    At 200MHz en = 70uV

    Term becomes = 70uV / 20K =3.5 nA

    if i select a less voltage noise opamp its current noise is high ! (as per seen components like LMH 6629)

    3. Thermal Noise term rt(4KT /Rf)

    (i want to go for extreme case only -40dC to 70dC )

    4*1.3*10^-23*(70+273) = 17.8 * 10^-21 J

    17.8*10^-21 / Rf = 89*10^-26 = term which can be put aside for now?! When compared to the actual problem

    4. Input capacitance term:

    Important factor which has effect of increasing gain even

    Input capacitance term = en* 2 * pi * f-3dB * Cin/rt(3)

    En = 70uV

    Cin= Cd(diode)+Cdif(opamp diff input)+Ccm(common mode inp)

    = 12p + 0.1+0.45 =12.55pF

    F-3dB = rt(4G/(2*pi*20K*12.55p)=50MHz

    Total term = 70uV * 2* 3.14* 50M * 2.55p /(rt(3))=32359*1p=32nA

    So the total input noise will be 132nA itself where as i am trying to sense 10nA :/

    5. Now calculating high frequency noise gain,

    NG = 20log (1+ (Cs/Cf)) = 20log (1+ (12.55p/100f)) = 42dB

    NG = 125

    So 132nA would become 132nA*20K*125 = 330mV which is horrible!(or did i do any blunder in calculation)

    The signal which i can detect or measure would be at least 800mV-1V which is equivalent to input 50uA so this is my lowest limit , when going with a 5V supply i would saturate at 250uA only so my dynamic range is horrible to be ridiculed :(

    Where i was aiming for 35dB at least

    So if this is the situation i can simply avoid using a TIA and can go for using a resistor of 50ohm which gives me out a 1mV output voltage which i can keep as threshold and give the signal to a high speed comparator and do the digital conversion!

    Why should i go for a TIA if i am not able to sense less than 20uA???

    If there are any calculations mistakes please correct me in calculating the minimum current that can be sensed

    Now suggest me what can be thought, will any of below examples would work?

    a. Recieved some harsh but useful comments on unavailability of high speed FETs here , if i want to use the approach of bobs

    b. Failed to create a log amplifier, have to give a try once more,give your comments here

    c. Going with a configuration like this with a FET at input for reducing input noise? Any way my opamp has a FET input, adding one more FET at input, have to see the effects, will it help ??

    d. Leaving the TIA and search for alternatives? if so please suggest

    PS : only for reference i have put some external forums links , you can answer them here itself,hope iam not violating any forum rules, before you suggest, you can read the answers and see the possibilities of your suggestions being constructive

    Thanks
     
    Last edited by a moderator: May 7, 2017
  2. jcsd
  3. Jun 2, 2016 #2

    Tom.G

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    The Data Sheet shows 7fA not 7pA.
    upload_2016-6-2_19-28-33.png
    in
    Input Current Noise Density, VCM = 2.75V f = 100kHz 7 fA/√Hz
    Input Current Noise Density, VCM= 4.0V f = 100kHz 7 fA/√Hz
     

    Attached Files:

  4. Jun 2, 2016 #3
    upload_2016-6-3_8-10-42.png upload_2016-6-3_8-12-2.png
    Find Pg.8 and Pg.9 of the datasheet
    only few datasheets show this, fortunately they have shown what happens at high frequency, iam operating at 10ns pulse which is 100M
     
  5. Jun 2, 2016 #4

    Tom.G

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    OK, I had missed that. However that is wideband noise, how about following the first stage with a bandpass filter.

    When fighting Noise or Bandwidth problems a few cascaded stages work better than having all the gain in the first stage. The amplifier slew rate is obviously sufficient for the application but the open-circuit gain drops to around 35 at 100MHz, so four stages will be needed to reach your 120db anyhow.

    Adding external FETs to the input can help if their noise is low enough. That opamp is pretty good as is. You can even parallel several FETs. This will add the transconductances but the noise, being uncorrelated, increases as the square root of the number of parallel FETs.

    Your four stage amplifier looks fairly good other than the opamp saturation effects. You can add a pair of inverse-parallel diodes across the feedback resistors to avoid saturation. That of course limits the output voltage of each stage to 700mV. If you need more output, put some more diodes in series. That will also reduce their effective capacitance.
     
    Last edited: Jun 3, 2016
  6. Jun 2, 2016 #5
    which is the noise at high frequency where i operate, i think i should consider this itself, is there any reason to ignore it, as you are saying however ?!

    i really doubt how would one interface FETs at input of an opamp, obviously like the link i have attached in my answer speaking on bobs approach, with a differential FET pair at input, but somebody has trashed my approach saying its very difficult to get a ns response time FETs, even when i tried to simulate with BF862, i have failed in using it at high frequencies i have clearly observed a sharp downfall in gain after 1MHz

    would you please show me how would you tackle this, please show as a schematic for better understanding to all users
     
  7. Jun 3, 2016 #6

    Tom.G

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    In no particular order.

    Also try a Google search for 'pinfet'.

    For schematic, see your post at stackexchange.com:
    http://electronics.stackexchange.co...nvert-analog-10ns-pulse-to-digital-10ns-pulse

    The output pulsewidth is being stretched because the opamps are saturating at higher input levels and it takes time for them to recover, that's why I suggested adding diodes in my post #4. The added diodes would keep the opamps out of saturation.

    Another approach would be use a Log Amplifier for Stage 2, such as the LMV221 http://www.ti.com/product/LMV221/datasheet/abstract#snws01822
    The LMV221 has a 40db dynamic range and a 50 Ohm input impedance, so driving it may present a challenge. It's sensitivity and input impedance work out to 150uA so you will still need the TIA.

    Since you are trying for a 60db dynamic range, you may have to use two channels with different gains, or a programmable gain amplifier early in the chain.

    I'm actually surprised you obtained such good results at the 10nA input! Rule-Of-Thumb says you need 10 times the signal bandwidth to get accurate measurements. Although I've sometimes used 3X bandwidth for 'acceptable' results.

    As to bandwidth limiting, wideband noise is the cumulative noise from DC to the frequency in question. The present circuit rolls off below 10MHz, giving you about a 90MHz bandwidth. But you don't have any signals below 100MHz, and there is noise down there. You could very likely get away moving that 10MHz breakpoint to at least 30MHz, perhaps higher. Try it and see how high you can go before the pulse widths start stretching.
     
    Last edited: Jun 3, 2016
  8. Jun 3, 2016 #7
    i was been seriously thinking about this past few days, but when tried i was failed for log amps being very slow, but i have seen few LVAs which stopped my heart beat costing around 1500$ which made me to think there is something wrong with log amplifiers, ns response time log amplifiers are no where present, the link you shared seems absolutely no relation with the application i am targeting, may be i will bring unwanted difficulties to the design by using some other application oriented chip, any way neither the slew rate nor the response time not everything is right with the chip suggested,

    this idea is very informative, currently i have freeze my sensor selected and its a custom made for my application and more advantageous than any for my use case, so there is no way i would change the sensor and go for a different mechanism

    yeah can you please suggest a mechanism in terms of schematic to protect the TIA input from excess current or in other way making TIA or opamp to avoid saturation

    even i am surprised, the forum members where shouting that JFET differential pair would not even work at all, but the simulator has shown proper results which even took me to surprise, i have kept such design aside as i am making the design more bulky and noisy with that approach

    for got to mention my pulse width ranges from 10ns - 150ns so the frequency is from 5Mhz to 100MHz
     
  9. Jun 3, 2016 #8

    Tom.G

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    Note the Diodes in the feedback loop below, they clamp the gain to unity when the output tries to rise above their threshold voltage (about 0.6V).
    Since you are using differential amplifiers, the diodes are needed in both fedback loops in a stage.
    ZCD_INV_LIMITER.gif
     
  10. Jun 5, 2016 #9
    thanks for the diode based approach, i would try it, i have tried in LTspice which gave me oscillations from the opamp output, here i also want to know what are risks if i use a very low reference voltage of 1mV with my comparator, is that risky to with low reference voltage with comparators ???
     
  11. Jun 6, 2016 #10

    Tom.G

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    Oscillations should not occur if the opamps you are using are stable down to unity gain. You can add a resistor between the diodes and the opamp input to adjust gain if needed for stability.

    You have to set the comparator deadband (hysteresis) to be greater than the noise, else it triggers on the noise.
     
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