Consecutive logic gates voltage loss

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Discussion Overview

The discussion revolves around the voltage loss observed in a network of CMOS logic gates, specifically focusing on the output voltage of an AND gate when the inputs are at 4 V. Participants explore potential reasons for the unexpected output voltage and the implications of circuit design choices.

Discussion Character

  • Technical explanation
  • Debate/contested

Main Points Raised

  • One participant notes measuring 4 V at the inputs of an AND gate but receiving only 2 V at the output, questioning whether 4 V is sufficient for a logical HIGH.
  • Another participant suggests checking the datasheet for the specific logic family being used (74HCxx) to verify the valid input and output voltage levels.
  • A participant mentions that unused inputs of CMOS gates should be tied to a defined voltage (high or low) to avoid floating inputs, which could affect performance.
  • There is a suggestion to remove the LED connected to the output of the AND gate to measure the output voltage without any load, indicating that the LED may be influencing the observed voltage.
  • Participants discuss the importance of using a series current-limiting resistor with the LED to prevent excessive current draw, which could lead to voltage drops at the output.
  • Concerns are raised about the maximum current drive of the gates and the conditions under which output voltage levels (Voh, Vol) are specified in the datasheet.

Areas of Agreement / Disagreement

Participants generally agree on the importance of proper circuit design, including tying unused inputs and using current-limiting resistors. However, there remains uncertainty regarding the exact cause of the voltage drop at the output of the AND gate, with multiple factors potentially contributing to the issue.

Contextual Notes

There are limitations regarding the assumptions made about the circuit configuration, the specific logic family characteristics, and the impact of connected components like the LED on the output voltage.

damosuz
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Hi,

I am introducing myself to logic circuits and I want to build a network of logic gates (CMOS) that have push buttons as inputs and LEDs as ouputs. At most there are 4 gates between a button and a LED. However, at the inputs of the 4th gate, which is a AND gate, I measure 4 V and 4 V, but the output I get is only 2 volts. I don't understand why. I use Vcc = 5 V.

Maybe 4 V isn't considered a 1 and I need to boost the inputs to 5 V? If this is so, how can I do that?

Thank you.
 
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damosuz said:
Hi,

I am introducing myself to logic circuits and I want to build a network of logic gates (CMOS) that have push buttons as inputs and LEDs as ouputs. At most there are 4 gates between a button and a LED. However, at the inputs of the 4th gate, which is a AND gate, I measure 4 V and 4 V, but the output I get is only 2 volts. I don't understand why. I use Vcc = 5 V.

Maybe 4 V isn't considered a 1 and I need to boost the inputs to 5 V? If this is so, how can I do that?

Thank you.

What logic family are you using? 74HCxx? 74AHCxx? 74VHCxx? 74xx?

For whatever logic gates you are using, look on the datasheet at the specs for Vih, Vil, Voh, Vol. That will tell you what the valid input and output voltages are...
 
I am using 74HCxx. According to datasheet, 4 V should be considered HIGH.

I did not connect the unused inputs to 0 V. Can that be the problem?
 
damosuz said:
I am using 74HCxx. According to datasheet, 4 V should be considered HIGH.

I did not connect the unused inputs to 0 V. Can that be the problem?

Unused CMOS logic gate inputs always need to be tied either high or low. Floating CMOS inputs are a bad thing in general.
 
damosuz said:
, at the inputs of the 4th gate, which is a AND gate, I measure 4 V and 4 V, but the output I get is only 2 volts. I don't understand why.
Remove the LED that you have connected to the output of that gate, so that nothing at all is connected to that gate's output. What voltage do you measure now?
 
NascentOxygen said:
Remove the LED that you have connected to the output of that gate, so that nothing at all is connected to that gate's output. What voltage do you measure now?

Ah, good point. And be sure to use a series current-limiting resistor. Check what the Iout capability of the 74HC family is (it's not much), and add a resistor in series to limit the output current to that max Iout. You will get about a 2V drop across the LED, so assume a 3V drop across the resistor to help you choose the value of the resistor using V=IR.
 
Pay attention to the max current drive of the gates. At what current is Voh or Vol measured. Or, at what voltage is Ioh or Iol measured. Some datasheets also list the short circuit current, for example.

2V is about right for a logic gate connected directly to an LED (bad form )
 

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