Finding Memory System Latency: Interleaving Effects

[Knowledge92]

I've been searching for some type of equation or explanation of how to find the latency (access time) of a memory system when given the bandwidth, the precharge (refreshing) time between accesses, and how many bytes of data are being transferred...

Also I am not sure as to how memory interleaving would change this latency...

Any help is greatly appreciated!

 

[phyzguy]

It depends on the architecture of the memory, so I don't think there is a general relation. A serially architected memory can have a very long latency, but then a very high bandwidth once you've arrived at the correct location, while a random access memory will have a much smaller latency.

 

[Knowledge92]

Thanks for that information, but maybe it'd help if I just posted my homework question:

Assume a memory system has a bandwidth of 120 MBytes (M = 2^20) per second and has aprecharge (refreshing) of 5 ns between accesses. What is the memory systems latency (access time) for the following two cases?

a. Two bytes of data are transferred and memory interleaving is not used.

b. 4-way memory interleaving is used and each module is able to transfer two bytes per access.

I am unsure how to start this. I found a computer engineering equation that latency = seek time + rotational delay + transfer time + controller delay, but I have no idea how to apply this general form of a latency equation (or if I am supposed to use this equation at all) to this type of problem.

Thank you very much!

 

[rcgldr]

latency = seek time + rotational delay + transfer time + controller delay

This is a formula used for hard drives, not system memory.

 

[Knowledge92]

This is a formula used for hard drives, not system memory.

OK.. is there a formula for the latency of system memory/what is it?

 

[rcgldr]

OK.. is there a formula for the latency of system memory/what is it?

Wiki articles:

http://en.wikipedia.org/wiki/DDR3_SDRAM

http://en.wikipedia.org/wiki/SDRAM_latency