How to choose the sampling time for the delay unit

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SUMMARY

The discussion centers on selecting an appropriate sampling time for a delay unit within a fuzzy logic controller design. Key factors influencing this decision include the specific application of the fuzzy logic controller and the nature of the error signal being processed. Participants emphasize the necessity of providing detailed context to receive tailored advice on the delay block's implementation. Understanding system characteristics and requirements is crucial for determining the optimal sampling time.

PREREQUISITES
  • Fuzzy Logic Controller design principles
  • Understanding of error signal characteristics
  • Knowledge of delay block functionality in control systems
  • System dynamics and characteristics analysis
NEXT STEPS
  • Research the impact of sampling time on fuzzy logic controller performance
  • Explore methods for analyzing error signal behavior in control systems
  • Learn about delay block implementation in various control strategies
  • Investigate system identification techniques for better understanding of system dynamics
USEFUL FOR

Control system engineers, fuzzy logic controller designers, and students working on control theory projects will benefit from this discussion.

Abdul Wali
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hi, i am designing a fuzzy logic controller, i need to use a delay block for the change in error signal now i don't know that based on what factors should i choose the sampling time for this unit
 
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Abdul Wali said:
hi, i am designing a fuzzy logic controller, i need to use a delay block for the change in error signal now i don't know that based on what factors should i choose the sampling time for this unit
Hey abdul,

I've mentioned this to you before. In order to give proper advice you NEED to include more information.

Whats the fuzzy logic controller for?
What is the error condition?
you say you need a delay block... why? is it a homework requirement? Is it required due to system characteristics.

We don't know these things. You do. In order for us to help you, you need to help us.
 
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Most likely this can only be answered by an "old timer". I am making measurements on an uA709 op amp (metal can). I would like to calculate the frequency rolloff curves (I can measure them). I assume the compensation is via the miller effect. To do the calculations I would need to know the gain of the transistors and the effective resistance seen at the compensation terminals, not including the values I put there. Anyone know those values?

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