How to Find Power Dissipation of different ICs

[KrNx2Oh7]

I've been looking over how to find power dissipation for voltage regulators, op-amps, comparators, logic gates, and amongst other things.

Ive looked at some resources and I'm not getting what each variable means.
From what I understood so far I've seen

PDstatic = Vcc*Icc where Vcc and Icc are the supply voltage and currents found in the datasheet

Then for voltage regulators since there isn't a source voltage I used
PDstatic= (Vin-Vout)*Io where you subtract input voltage and output voltage and find the load current from the schematic.

Then for logic gates I use
(I^2)Rdon , where Rdon is the gate source resistance found in the datasheet.
(1/2)*C*V^2, where C is the mos capacitnce also found in the datasheet

ARE ANY OF THESE CORRECT?! There are just too many sources and I just don't know a general way of finding the static PD.

I'll ask about dynamic power dissipation after I get this

 

[berkeman]

I've been looking over how to find power dissipation for voltage regulators, op-amps, comparators, logic gates, and amongst other things.

Ive looked at some resources and I'm not getting what each variable means.
From what I understood so far I've seen

PDstatic = Vcc*Icc where Vcc and Icc are the supply voltage and currents found in the datasheet

Then for voltage regulators since there isn't a source voltage I used
PDstatic= (Vin-Vout)*Io where you subtract input voltage and output voltage and find the load current from the schematic.

Then for logic gates I use
(I^2)Rdon , where Rdon is the gate source resistance found in the datasheet.
(1/2)*C*V^2, where C is the mos capacitnce also found in the datasheet

ARE ANY OF THESE CORRECT?! There are just too many sources and I just don't know a general way of finding the static PD.

I'll ask about dynamic power dissipation after I get this

Correct for the linear voltage regulator question. For static gates, just use Idd and Vdd. The output load is usually light for CMOS circuits that are static.

 

[KrNx2Oh7]

So for op amps and logic gates its only Vcc*Icc found in the schematic? I thought I had to consider the output for let's say an and gate. Don't I take load current and multiply by logic high and add to load current * logic low. Did you mean that there is no Io consideration for op amps and logic gates because its negligible?

 

[KrNx2Oh7]

If I have a positive power rail and negative power rail both Vcc do I use
2*(Vcc*Icc) to get the power

Also when the Vout of the voltage regulator is attached to a power supply I have to find the current for every other part of the circuit that is conncected to that power supply correct?
Is taht only for the voltage regulators

and for eveyrthing else I simply use the Vcc*Icc

 

[berkeman]

So for op amps and logic gates its only Vcc*Icc found in the schematic? I thought I had to consider the output for let's say an and gate. Don't I take load current and multiply by logic high and add to load current * logic low. Did you mean that there is no Io consideration for op amps and logic gates because its negligible?

Opamps and static logic gates would be treated differently. For logic gates with static outputs, the output current would generally be small enough that it could be ignored. Gate power consuption would go up significantly when switching currents are factored in.

For opamps, you need to include the output current.

If I have a positive power rail and negative power rail both Vcc do I use
2*(Vcc*Icc) to get the power

Also when the Vout of the voltage regulator is attached to a power supply I have to find the current for every other part of the circuit that is conncected to that power supply correct?
Is taht only for the voltage regulators

and for eveyrthing else I simply use the Vcc*Icc

For split supplies, yes, you would need to consider the Icc for each rail.

 

[KrNx2Oh7]

ok thank you for the help so far

So I only need to consider ICs that are above 100mW so I am thinking after looking at spec sheets that the AND gates have very low Icc around uA and Vccs are around 3-5 V and since no output currents are considered these would be well below 100mW right

Now sometimes when I am looking for Io it goes through some FETs and resistors
How am I suppose to approach the load current there

I think it has something to do with (1/2 C*Vcc^2) to get current?

edit again:
APA300-PQ208A
For this programmable logic device Do I multiply Vcc*Icc by the number of Vdd inputs there are which seems to be 8 in this case.

And thus if this was connected to the output of a voltage regulator the Io I have to find is it also Icc*8?

 

[KrNx2Oh7]

I feel like I'm asking too specific questions
Is there some general set of equations I can look at to apply?

I have a lot of different types of ICs so I wouldn't want to bother people with a 100 specific questions

last specific question:

It says for the logic gate that the output current low or output current high is around 15mA. Isn't that high enough to consider the output current for power dissipation?

 

[berkeman]

ok thank you for the help so far

So I only need to consider ICs that are above 100mW so I am thinking after looking at spec sheets that the AND gates have very low Icc around uA and Vccs are around 3-5 V and since no output currents are considered these would be well below 100mW right

Now sometimes when I am looking for Io it goes through some FETs and resistors
How am I suppose to approach the load current there

I think it has something to do with (1/2 C*Vcc^2) to get current?

edit again:
APA300-PQ208A
For this programmable logic device Do I multiply Vcc*Icc by the number of Vdd inputs there are which seems to be 8 in this case.

And thus if this was connected to the output of a voltage regulator the Io I have to find is it also Icc*8?

I feel like I'm asking too specific questions
Is there some general set of equations I can look at to apply?

I have a lot of different types of ICs so I wouldn't want to bother people with a 100 specific questions

last specific question:

It says for the logic gate that the output current low or output current high is around 15mA. Isn't that high enough to consider the output current for power dissipation?

Can you give the context of your questions? There are a lot of things that go into calculating currents and powers.

For example, logic circuits generally are switching at some rate. The parasitic capacitances that the logic outputs have to drive generally determine the output currents. Even though the logic outputs are driving high impedance logic inputs, the parasitic capacitance that they are also driving can take up a fair bit of current.

And on PLDs, you will generally need to look at their datasheet for Icc calculation techniques.