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I Cant Understand this mux implementation

  • #1
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i need to implement a 8-1 MUX using 2^3X4 and 2^3X1 proms

where there is a chip select input in the MUX

here is the solution of the circuit and the programming tables


http://s290.photobucket.com/albums/ll279/t...=IMG_8816-1.jpg [Broken]

i cant understand this circuit
there is s0 that goes in every prom independently
there is a chip select input inside of the "main prom"

i tried to trace out the way it works with pencil and paper
but this this really tough to understand

i couldnt get this pattern like in ordinary mux
that if we take s0=0 s1=0 s2=1 then take I1
eventually i got to the right answers
but i coudnt understand why????????
 
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Answers and Replies

  • #2
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Hi Galactic, where is the ckt n prog table? instead i watch some .... :-(
 
  • #3
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