I Cant Understand this mux implementation

[transgalactic]

i need to implement a 8-1 MUX using 2^3X4 and 2^3X1 proms

where there is a chip select input in the MUX

here is the solution of the circuit and the programming tables


http://s290.photobucket.com/albums/ll279/t...=IMG_8816-1.jpg [Broken]

i can't understand this circuit
there is s0 that goes in every prom independently
there is a chip select input inside of the "main prom"

i tried to trace out the way it works with pencil and paper
but this this really tough to understand

i couldn't get this pattern like in ordinary mux
that if we take s0=0 s1=0 s2=1 then take I1
eventually i got to the right answers
but i coudnt understand why?

 

[Refai]

Hi Galactic, where is the ckt n prog table? instead i watch some ... :-(

 

[transgalactic]

this is a link with the circuit and the tables:(i don't know why the previos one changed)

http://img120.imageshack.us/my.php?image=img8816ek9.jpg