Designing a JFET-JFET Cascode Amplifier: Tips and Resources

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The discussion centers on designing a JFET-JFET cascode amplifier, with the user seeking guidance on biasing and component values. Key points include the necessity of having the gate at a lower potential than the source for proper JFET operation, and the importance of knowing the pinch-off voltage (Vp) and saturation current (Idd) for biasing calculations. Users recommend utilizing datasheets for these parameters and suggest online tutorials for further learning. The conversation highlights the need for accurate calculations to optimize amplifier performance. Overall, resources and equations for biasing JFETs are essential for successful amplifier design.
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Hi. I'm not actually doing an electronics course (Maths & Physics), but I have just finished building a 140W BJT guitar power amplifier and cabinet. I'm looking to build a FET-FET cascode preamplifier now, but am not too familiar with JFETs - So far, I've got:

V+
|
Resistor
|
JFET2 (2N3819)
|
Resistor
|
JFET1 (2N3819)
|
Resistor & capacitor (parallel)
|
Ground

with the input on the gate of JFET1, output from the source of JFET2, and the base of JFET 2 tied to ground.

I've tried to derrive equations for the JFETs, in order to work out the values for the resistors and capacitors, but with no success - can anyone here help me, or point me to any good books/websites?

Cheers,
Mark
 
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When biasing Jfets, Gate has to be at a lower potential than the source. That's when drain to source current stars flowing. Drain to source current depends on gate voltage, and can be calculated using a quadratic equation.

When doing biasing calculations on jfets, two parameters are needed, the pinchoff voltage Vp, and the saturation current Idd. You can obtain these from the datasheet, or measure them easily.

I googled jfet biasing and there is a plenty of tutorials.

http://www.qrp.pops.net/fetbias.asp

Hope that helps.
 
Cheers!
 
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