Noise Margins & Gain Homework Help

[DODGEVIPER13]

Homework Statement

I really need help with them all but I mostly have a question over the problems with noise margins or gain terminology. The problems are located here on tutorial problems under the digital abstraction it is the second one under tutorial problems. The problems can be found here http://6004.mit.edu/ To be specific To limit my needs problem 1.

Homework Equations

The Attempt at a Solution

I have no idea what gain means, I know that to be a combination all device it must be gain>1 but what does this mean in terms of a graph. in other words how do I read gain by looking at a chart. Also how do I find Vol, Vil, Vih, Voh just by looking at the chart? Also what does noise margins mean exactly?

 

[DODGEVIPER13]

Well I guess noise can come from any electrical device such as resistors, inductors, or capacitors that can modify a waveform? And the noise margins must be the shift from that but how can I see these as the guys at MIT did without having that info but just by simply observing the graph?

 

[DODGEVIPER13]

Ah gain must be the slope between points if it only goes 1 between each point then it doesn't have enough if it goes at least 2 or something then it is gain>1

 

[berkeman]

Homework Statement

I really need help with them all but I mostly have a question over the problems with noise margins or gain terminology. The problems are located here on tutorial problems under the digital abstraction it is the second one under tutorial problems. The problems can be found here http://6004.mit.edu/ To be specific To limit my needs problem 1.

Homework Equations

The Attempt at a Solution

I have no idea what gain means, I know that to be a combination all device it must be gain>1 but what does this mean in terms of a graph. in other words how do I read gain by looking at a chart. Also how do I find Vol, Vil, Vih, Voh just by looking at the chart? Also what does noise margins mean exactly?

Noise margin in digital circuits is afforded by Vol < Vil and Voh > Vih. So even when you have some noise present in the logic lines, there is sufficient drive voltage to drive the inputs of the next gate far enough so that the noise does not cause false tripping.

The gain is indeed the slope of the Vo vs. Vi graph. You prefer to have a high gain, to help the switching of the gate to occur quickly.

Have you gotten any more insights into Vol, Voh, Vil, Vih since posting this a couple days ago?

 

[DODGEVIPER13]

No and thanks for the response

 

[berkeman]

No and thanks for the response

Why? No more insights? Haven't been doing any more reading or studying? Do you have specific follow-up questions?

 

[DODGEVIPER13]

I have been looking at other things because I didnt understand it? I do still wonder how they came up with those though, I just simply forgot about it because it had been so long.